搜索资源列表
C51Data
- Keil uVision2(8052芯片)下用C语言开发的串行菜单结构的简单数据采集系统-Keil uVision2 (8052 chip), with C-language development Serial menu structure of the SR Single Data Acquisition System
wait
- Flash中内置了一个状态寄存器（Status Register，SR）来指示Flash的当前工作状态和各种操作是否成功。要读取SR的当前值需要向CUI发送读状态寄存器命令（Read Status Register），命令码为0x70，SR中的内容将在DQ[7:0]上输出。The Read Status Register （0x70）command causes subsequent reads to output data from the SR until another command i
Verilog_SRAM.rar
- 使用Verilog写的SRAM的控制程序，仅供参考！,The use of the SRAM write Verilog the control procedures, for reference purposes only!
foundtrend08
- FPGA Architecture: Survey and Challenges Ian Kuon1, Russell Tessier2 and Jonathan Rose1 1 The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada, {ikuon, jayar}@eecg.utor
ALU1
- ALU 指令格式(16位） op DR SR fun 0--3 4—7 8--11 12--15 指令类 OP码 指令 FUN 功能描述 控制 0000 NOP 0000 空指令 HLT 0001 停机 有条件跳转 0010 JZ 0000 Z=1，跳转 JC 0001 C=1，跳转 JNC 0010 C=0，跳转 JNZ 0100 Z=0，跳转 Jump 0101 无条件跳转 LOAD 001
HC-SR04
- HCSR04超声波测距模块C程序资料（收集的）-HCSR04 ultrasonic distance measuring module data (collection)
MSP430F54xx_UCOSII
- 适用MCU: TI MSP430 5XX 适用ucos-ii版本：2.86 编译环境：IAR4.11B 主要的工作： 在MICRIUM网站上430移植代码的基础上进行了修改：5XX系列PC寄存器为20位，堆栈的宽度仍为16位，因此在对PC和SR的压栈处理上做了修改；另外在汇编程序里调用HOOK函数的CALL XXX 改成 CALLA XXX -Applicable MCU: TI MSP430 5XX applicable ucos-ii version: 2.86 bui
simulator
- 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is
HC-SR04
- HC-SR04超声波测距模块C51源码，包括1206和12064LCD显示，以及串口输出等，测量距离2cm-400cm，精度可达3mm。-HC-SR04 ultrasonic distance measuring module C51 source, including the 1206 and 12064LCD display and serial output, measure the distance 2cm-400cm, accuracy is up to 3mm.
LCD12864-DS18B20-HC-SR04
- LCD12864串行显示DS18B20温度和超声波测距HC-SR04, 非常适合初学者。-LCD12864 serial display DS18B20 temperature and ultrasonic ranging HC-SR04, very suitable for beginners.
DE2_NIOS_LITE_SRAM
- DE2-SRAM-IP-CORE 需要开发ip core的朋友可以参考哦 ~-DE2-SRAM-IP-CORE need to develop friends can ip core reference Oh ~
SR_Latch
- RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit i
Hybrid_Electric_Vehicle
- 混合动力电动车用开关磁阻电机控制系统研究(博士论文)本文依托国家十五“863”电动汽车重大专题项目,对混合动力电动汽车用的开关磁阻电机(SR电机)控制系统的关键技术进行专题应用研究,研究成果在武汉市的混合动力电动公交车510线路上运行并取得了满意的效果-the behavior of the power cell restricts the application and development of electric vehicle
srff
- SR flip flop is implemented using VHDL
SR-88-Manual_EN
- SR－88GPS模块数据手册，对于正在做GPS的朋友较有参考价值。-SR-88GPS module data sheet for a friend is doing more GPS reference value.
FPGA2SRAM
- 利用FPGA向SRAM中传输数据，可用于FPGA芯片的初始化和配置-The use of FPGA to transmit data to the SRAM, FPGA chips can be used for initialization and configuration
srandDflipflop
- this project is based on sr and d flip flop using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for e
51wtv
- 基于89c51的wt-sr语音模块的驱动！测试成功，完全好使！自己写的，绝无仅有哦~-89c51 of the wt-sr-based voice module driver! The test is successful, so that completely! Write your own, unique oh
EPM7064-SR-Motor
- CPLD EPM7064上编的开关磁阻电机换相逻辑-CPLD EPM7064，to control SR motor
SR-104A
- SR-104A继电器的相关说明文档和源码例子，在VB6.0下编译。-SR-104A relay of the relevant documentation and source code examples, in the VB6.0 compiler.