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RS(32to28)encoderanddecoder
- RS(32,28) encoder and decoder VHDL-RS (32,28) encoder and decoder VHDL
RSdecoder.rar
- cpld/fpga RS(204,188)译码器的verilog程序,cpld/fpga RS (204,188) decoder of the Verilog program
实现PS/2接口与RS-232接口的数据传输
- 实现PS/2接口与RS-232接口的数据传输， 可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。,The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received ch
rs_1.rar
- rs触发器的设计，是用vhdl实现的，欢迎下载。,rs flip-flop design is achieved using vhdl.
PIPE_LINING_CPU_TEAM_24
- 采用Quatus II编译环境，使用Verilog HDL语言编写实现了五段流水线CPU。 能够完成以下二十二条指令（均不考虑虚拟地址和Cache，并且默认为小端方式）： add rd,rs,rt addu rd,rs,rt addi rt,rs,imm addiu rt,rs,imm sub rd,rs,rt subu rd,rs,rt nor rd,rs,rt xori rt,rs,imm clo rd,rs clz rd,rs slt rd,rs,rt sltu rd,
rs_encorder
- RS编码的fpga实现，详细的vhdl文档，可以硬件实现。-RS coding fpga implementation, detailed documentation of vhdl can be implemented by hardware.
RS-code
- 我测试过的！Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
CCD
- 用TCD1501D驱动器产生CCD驱动的6个输出信号RS、CP、SP、SH以及Φ1、Φ2脉冲-Produced by CCD drive TCD1501D driven six output signal RS, CP, SP, SH, and Φ1, Φ2 pulse
ps
- RS(204,188)译码器的设计 异步FIFO设计 伪随即序列应用设计 CORDIC数字计算机的设计 CIC的设计 除法器的设计 加罗华域的乘法器设计-RS (204188) decoder design of asynchronous FIFO design application design sequence was pseudo-CORDIC design of digital computer design CIC divider design Le Hua
rs-codec-8-16
- RS[255,223]纠错码verilog源码，包含编码和解码模块，以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
RS
- reed selemon encoder vhdl code
RS_ENCODER
- DVBC RS编码,标准TS流输入输出接口!-DVBC RS encoder
RS-5-3-CODE
- RS(5,3）编码器原程序 程序已经调试过 且比较简短-RS(5,3） coder ,this code is very short
RS
- RS编码器的VHDL源程序,程序有点大，不过能用。-RS encoder VHDL source code, program a little big, but can be used.
rs_decoder204_188
- RS译码的Verilog实现，用的是改进的BM算法，已在QuautusII9.0上调试通过-rs decoder verilog
RS
- 基于FPGA的RS编码，包括RS码的编码原理，RS电路的设计与实现-FPGA-based RS code, including the RS, the coding principle, RS Circuit Design and Implementation
RSencFlash
- RS(255,239) encoder for NAND Flash controller
Verilog_RS_31_19
- RS Decoder (31,19,6) v1.1
RS
- RS译码器的设计，使用RS码设计的译码器-RS decoder design, the use of RS code decoder design
rs-enc-255-239
- rs encoder21-rs encoder2111111111222222222222222222222222222222222