搜索资源列表
ahb_ram
- AHB接口的ram控制器，可靠性非常强。除了两个周期内发生读到写或写到读的极限情况（一般处理器设计中不会有这种传输方式），其他传输方式完全没有问题-AHB interface ram controller, reliability is very strong. In addition to occurring in two cycles read or write read write the limit (usually processor design will not have such
simulator
- 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is
CAST_sdr_sdram_ctrl-xact
- Single Data Rate Mobile SDRAM Controller Core with AHB Interface
AHB_SRRAM
- SSRAM with AHB bus interface source code
eth
- 一个ahb接口的千兆以太网MAC，包括apb的配置接口-Ahb a Gigabit Ethernet interface MAC, including the configuration interface apb
slaveAHB
- amba总线的AHB部分，与从机相连接口的写法，载自其它网页。-amba AHB bus parts from the machine connected to the interface with the wording set out from other pages.
ARM
- 基于ARM核的嵌入式CPU内AHB接口的实现。-CPU based on ARM core embedded within the AHB interface.
USB2_0
- USB2_0设备控制器IP核的AHB接口技术。-USB2_0 Device Controller IP Core AHB interface technology.
AHB-Default-Slave-Module
- AMBA2.0版本AHB总线缺省从设备设计方面的技术支持，参考ARM公司AMBA技术手册。对AHB缺省从设备电路的接口、基本逻辑等方面进行介绍。-AMBA2.0 version of the default from the AHB bus support equipment design, ARM AMBA technology reference manual. Default on the AHB slave interface circuit, the basic logic, etc.
AHB-Decoder-Module
- AMBA2.0版本AHB总线译码单元设计方面的技术支持，参考ARM公司AMBA技术手册。对AHB译码单元电路的接口、基本逻辑等方面进行介绍。-AMBA2.0 version of the AHB bus decoding unit design technical support, refer to ARM AMBA technical manual. AHB decoder unit circuit of the interface, basic logic, etc. are introdu
SOC
- SOC AMBA 总线接口代码，适合了解AHB APB协议-SOC AMBA bus interface code for understanding AHB APB protocol
ahb_verilog_design
- 代码为ahb interface ，用verilog编写的,包括仿真和综合。-Code for the interface AHB, written in Verilog, including simulation and synthesis.
ahb_ebc
- Sipmle external bus controller realization on Verilog HDL with AHB interface. Support RAM/ROM/NAND Flash devices.
Ahb2Apb
- AHB总线协议转APB总线协议的接口IP，使用Verilog代码实现，有详细的英文注释(AHB bus protocol turn APB bus interface IP, use Verilog code implementation, and have a detailed knowledge of the English comments)
ahb_master
- AHB总线接口描述，MASTER的接口描述，AMB总线协议(AHB bus interface descr iption, MASTER interface descr iption, AMB bus protocol)
ahb_task
- ahb接口的sram做读写测试的读写时序(SRAM of the AHB interface for reading and writing tests)
ARM_SOC
- ARM最小系统，vivado或ISE综合后下载至FPGA板子上可以做ARM用，包含连接在AHB总线上的RAM和ROM，ARM内核引出JTAG接口，可以连接调试器用keil-MDK进行调试！(ARM minimum system, vivado or ISE integrated download to the FPGA board can be used as ARM, including the RAM and ROM connected to the AHB bus, the ARM ker
dma_ahb_latest.tar
- AHB DMA verilog源码 AHB总线 DMA接口源码(AHB bus DMA interface source code)
国产FPGA参考设计IPCORE_UART_example_M5&M7
- 国产FPGA的UART参考设计IPCORE源代码。 The IP provides two kinds of simplified interface connected to EMIF bus and AHB bus for communication with 8051 core and ARM core.The two kinds of interface are full-duplex serial communication interface. Support programmabl