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Arbiter
- Arbiter.v verilog实现 三路请求，使用循环策略的仲裁器 含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit
arbiter
- VHDL源代码共享,资源多多共享,论坛上多多讨论!
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
arbiter.rar
- 一个用verilog编写的总线仲裁程序。多个设备共享总线，不同设备的优先级是变化的，保证每个设备都有公平的使用总线的机会。,Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity t
Arbiter
- Arbiter unit includes client and server units. Used for Arbitation of multipliers in Altera FPGA based project. The code supports several multipliers and several clients with different priorities.-Arbiter unit includes client and server units.
round_three_stage
- 3 stage round arbiter using verilog
arbiter_priority
- A priority arbiter design which will help some people out there. hope this will be useful for verification engineers
LIP1732CORE_system_mbus_arbiter
- System Verilog M bus arbiter module
LIP1731CORE_system_gbus_arbiter
- Verilog system G bus arbiter module
LIP1733CORE_system_vbus_arbiter
- Verilog V Bus arbiter module
round_robin_arbiter
- Round Robin Bus Arbiter for 5-node 8-bit bus
Verilog-Round-Robin-Arbiter-Model.tar
- Verilog Round Robin Arbiter Model
3
- Round-robin arbiter的行为。状态机的输入为Reset、CYC0、CYC1和CYC2，输出为GNT0、GNT1和GNT2。任选以下任一方式描述此状态机：-Round-robin arbiter
arbriter-full
- this code is arbiter verilog design code and with testcases.
AHB
- 基于混合优先权算法的AHB总线仲裁器的设计-Hybrid algorithm based on priority AHB bus arbiter design
AHB-Arbiter-Module
- AMBA2.0版本AHB总线仲裁器设计方面的技术支持，参考ARM公司AMBA技术手册。对AHB仲裁电路的接口、基本逻辑等方面进行介绍。-AMBA2.0、AHB Arbiter Module
arbiter_ip
- Arbiter code for simulation purpose
arbitration
- arbiter code in verilog hdl
arbiter-design-and-verification
- design and verification of arbiter
Arbiter-VHDL-based-design
- 1、熟悉VHDL的编程。 2、熟悉七人表决器的工作原理。 3、进一步了解实验系统的硬件结构。 -Arbiter VHDL-based design