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21IC ARM微控制器LPC210X的LCD接口技术
- 摘要：本文分别以GPI0口直接连接、串行转换连接、CPLD分部连接三种方法阐述了无外部总线的Philips ARM微控制器LPC210X与点阵图形液晶显示器的接口设计，并给出硬件电路框图和主要程序。 -Abstract : GPI0 I were to directly connect a serial link, connecting CPLD Division three methods described without external bus Philips LPC210X ARM
CPLD_CODE1
- ju继续上载CPLD的黄金参考源代码，希望对电子爱好者有所帮助-ju continue on the CPLD gold reference source, and I hope to help e-lovers
VHDL_Development_Board_Sources
- 这是我最近买的一套CPLD开发板VHDL源程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟.-which I have recently bought a CPLD Development Board VHDL source code accompanied the development
LA_USB
- USB和CPLD之间传输,已经调试完成,向SRAM里写数据后从FX2 USB GPIF 口读出,使用EZ-USB Control Panel 读-between USB and CPLD transmission, has completed testing, SRAM is about to data from USB FX2 GPIF I read, use EZ-USB Control Panel Reading
Verilog_Development_Board_Sources
- 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code q
CPLD
- 一种基于CPLD和PC I总线的视频采集卡的设计方案
solution1324
- SX-CPLD/FPGA 数字逻辑电路设计实验仪 SX-CPLD/FPGA 数字逻辑电路设计实验仪 产品介绍 1.利用CPLD/FPGA 提供的软硬件开发环境学习最新逻辑IC 设计，以取代TTL/CMOS 复杂的硬件设计。 2.可使用电路绘图法、ABEL 语言、波形图和数字硬件描述语言法(VHDL/AHDL)来开发电路。 3.CPLD/ FPGA 提供引脚可任意设定,故作测试实验时不需要做硬件连接,可节省大量连线焊接时间,快速学习软硬
hdb3 decoder
- 我上期做的VHDL设计方案，用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
bono_evb_cpld_1.2.rar
- sources of CPLD (fpga) from freescale i.MX27 Avanced Designe System Develpment Kit board,sources of CPLD (fpga) from freescale i.MX27 Avanced Designe System Develpment Kit board
UART
- 串口实验，很好用，我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
CPLD
- 风力发电设备用CPLD外围控制程序。包括故障锁存，IO口输出输入，地址线译码等。-Wind power generation equipment control procedures external CPLD. Including the fault latch, IO I O, address decoding and other lines.
EX08_GPIO
- **实验目的:了解如何通过CPLD来扩展DSP的IO使用 ** **实验说明:我们引出了CPLD的16个IO口的输入和输出,具体的定义大家可 ** ** 参照我们所提供的CPLD代码.在这里我们通过程序的改变来配 ** **置IO口的输出变化,并没有对输入做任何操作,大家以后需要用 ** ** 的时候可以自己来做 ** ** ** 实验结果:可设置断点，然后用万用表量取电平-** Experimental Objective: To learn how to DSP thro
jtagdownload
- alter cpld下载线制作方法集合，自己做就行，不用花40元去买了-alter cpld download cable production method of collection, make their own on the line, do not have to spend 40 yuan to buy a
CPLD-FPGA
- FPGA的学习指南，绝对经典，内容比较超值，我已经细心读过了，讲解清晰，快速入门。-FPGA-study guide, an absolute classic, the content of more value, I have carefully read, and to explain clearly, Getting Started.
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
epm570-2
- cpld使用手册，相信芯片资料介绍，一本不可多得的资料说明-cpld manual, I believe that chip materials, a rare information
DSPandCPLD
- 基于DSP+CPLD的伺服控制卡的设计,资料很好，很不错，希望对大家有用。-Based on DSP+ CPLD design of the servo control card, data very good, very good, and I hope useful.
CPLD
- epm240GT100C3开发板原理图，希望对你们有用。-epm240GT100C3 Schematic diagram，I hope it is useful to you
CPLD
- 使用CPLD扩展I / O，控制所有输入和输出引脚读写操作，以及对各片选信号的控制。-The CPLD is used to expand the I/O control read and write control of all input and output pins, as well as the chip select signal.
gas-test-cpld
- 瓦斯测试仪CPLD部分程序，采用图表式编程，功能包括I/O扩展、分频、通信等。-The gas tester CPLD part of the program charts programming features include I/O expansion, divider, communications, and so on.