搜索资源列表
DDR3
- DDR3控制器，基于Altera平台，修改管教后直接可以下载进PFGA-DDR3 controller, based on Altera platform, modify the discipline can be downloaded directly into the PFGA
52K_19200_1_2010.02.08.16.06.44_4247_KO[1].pdf.zi
- DDR3 SDRAM datasheet please refer want to development DDR3 Controller
ddr3_altera_use
- altera kit gx4 上DDR3 控制器的使用-altera kit gx4 on the use of DDR3 controller
94117c05d50c
- Its a clock Sequence for DDR3 Controller.Hope u find it useful
ddr3_controller1
- ddr3 controller for axi interface
DDR3_user_design
- 在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器，里面生成了Core，可用于DDR3读写控制-On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control
DDR3-SDRAM-Controller
- DDR3的控制器（并带有Testbench），可烧录到FPGA中对内存进行读写，相关技术人员可在该代码上修改用于其他场合-DDR3 controller (with an Testbench), the FPGA can be burned to the memory read and write, the relevant technical staff can modify the code to be used on other occasions
vc707-mig-rdf0160-14.3
- 适用于DDR3 控制器代码等的FPGA代码-DDR3 controller code for FPGA code, etc.
DDRController
- DDR3控制器，用于FPGA内部对DDR进行操作，利用Avlone总线进行对接-DDR controller
ddr3_demo_verilog
- 基于Verilog HDL的ddr3控制器，适用于lattice的ECP3系列-ddr3 controller based on Verilog HDL，used in lattice ECP3 serial FPGA
mcb_traffic_gen
- 本文档为ddr3的控制器，可以实现DDR3的读写操作。-This document is ddr3 controller, DDR3 can achieve read and write operations.
mig_7series_v1_9
- DDR3控制器源码，针对XilinxFPGA的DDR3控制器的源码，已经验证通过。-DDR3 Controller，complete DDR3 controll，have pass verificaion.
axi_master
- DDR3 控制器，axi4_full 模式， burst长度为16，应用于xilinx平台。-DDR3 interface controller， axi4_full working mode with burst length 16, can operate on the xilinx platform.
02_ddr3_test
- Altera fpga ddr3 控制器测试模块(Altera FPGA DDR3 controller test module)
Verilog_1Gb_DDR3_G_Die
- ddr3控制器，速率可达1Gbps，语言使用verilog，已经加入tb(ddr3 controller, can be used to ddr3 control,high speed)
DDR3_controler
- s6和k7 fpga的ddr3 ip控制器使用说明；(S6 and K7 FPGA DDR3 IP controller use instructions)
09_ddr3_test
- 利用vivado的MIG控制器来实现DDR3的读写(Using vivado's MIG controller to realize DDR3's read and write)