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core3DES
- Full Des Simulation Code
DES-HDL
- 用HDL实现的DES加密算法，通过前仿真，希望对大家有帮助-HDL implementation of the DES with the encryption algorithm, by pre-simulation, we want to help
des
- des解密加密的verilog源代码其中包含有测试源代码，仿真结果图-verilog des decrypt encrypted source code which includes testing the source code, Simulation results
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH
- SIMULATION AND SYNTHESIS OF TRIPLE-DES BLOCK CIPHER USING VHDL
DSP
- Etudes performances de système de communications par satellite (simulation DSP)-Etudes des performances de système de communications par satellite (simulation DSP)
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH
- This project presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously introduced technique to protect smart card implementations from these