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  1. rs_decoder_31_19_6.tar

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  2. Hard-decision decoding scheme Codeword length (n) : 31 symbols. Message length (k) : 19 symbols. Error correction capability (t) : 6 symbols One symbol represents 5 bit. Uses GF(2^5) with primitive polynomial p(x) = X^5 X^2 + 1
  3. 所属分类:VHDL编程

    • 发布日期:2014-01-22
    • 文件大小:14247
    • 提供者:孟轲敏
  1. Equalization_Tutorial

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  2. Adaptive equalization教程-Adaptive equalizers compensate for signal distortion attributed to intersymbol interference (ISI), which is caused by multipath within time-dispersive channels. 􀂃 Typically employed in high-speed communication
  3. 所属分类:SCM

    • 发布日期:2017-04-03
    • 文件大小:404896
    • 提供者:陈鹏
  1. cordic

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  2. we propose a low-cost sequential and high performance architecture for the implementation of CORDIC algorithm in two computation modes. It suited for serial operation that performs conversion between polar and rectangular coordinate systems, essentia
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-30
    • 文件大小:1811
    • 提供者:Nihel Neji
  1. fft-ip-core

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  2. 通过调用ISE中的fft IPcore实现了fft计算,输入数据通过textio从文本文件读入,处理后的数据再读入文本中。由于数据精度问题,与MATLAB计算的结果存在一定的误差-By calling the ISE of FFT IPcore implements the FFT computation, the input data through textio read a text file, after processing the data to read the text aga
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-21
    • 文件大小:6157600
    • 提供者:
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