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Fir Filter
- 2 D FIR Filter
FIR-FILTER
- 详尽的介绍了，AD转换和FIR滤波的情况，对初学FIR滤波的同志有很大的帮助。-Detailed introduction to the, AD conversion and FIR filter case, for beginners gay FIR filter is very helpful.
FIR-filter-
- 基于labview下的数字FIR滤波器的源程序，可用来学习-Labview-based digital FIR filter under the source, can be used to study
FIR-h(t)
- 利用窗函数法设计FIR滤波器，给出其抽样响应。程序中调用了子程序window。-Using window function design FIR filter, given in response to its sample. Calling the subroutine program window.
FIR
- 基于FPGA的FIR滤波器设计思想，里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
FIR
- 线性缓冲区FIR滤波器设计，可利用MATLAB产生系数，利用CCS开发环境，调试成功！-FIR filter design for linear buffer can be generated using MATLAB coefficient, the use of CCS development environment, debugging success!
fir-vhdl-code
- FIR FILTER CODE with VHDL
verilog.DA.FIR..
- 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
fir
- code for fir filter see it is from altera site.-code for fir filter see it is from altera site.
FIR
- FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
FIR
- FIR滤波器在DSP TMS320C5402上的实现（C语言和汇编语言实现）-FIR filter in the DSP TMS320C5402 implementation (C and assembly language implementation)
FIR
- FIR filter up to 128x
fir
- Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
FIR-filter-vhdl
- 工程：用VHDL语言实现的FIR滤波器设计。-FIR filter using vhdl using QuartusII
FIR-filter-using-fpga-design
- 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ，QuartusII software
fir-filter-design-using-fpga-with-MAX-Plus2
- 基于FPGA的高阶FIR滤波器设计用max-plus －II软件仿真-fir filter using fpga with max-plusII
FIR
- 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
fir
- dspic的fir滤波，已在实验板上完成调试，效果较理想，可供参考。-dspic the fir filter, has been completed in the experiment on-board debugging, a good effect, for reference.
fir
- this is an vhdl code for fir filter-this is an vhdl code for fir filter....
fir filter design
- FIR FILTER DESIGN IN VERILOG ON FPGA