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基于verilog的fir滤波，并带matlab仿真
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一个 FIR 滤波器的 verilog 实现， 与 matlab 产生的 reference code 相互验证。,Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication.
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使用verilog 写的FIR滤波器，里面并有matlab程序，是从altera官网下来的。。希望对大家游泳。-Use verilog to write the FIR filter, which have matlab and procedures, are down from the official website of the altera. . Everyone would like to swim.
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基于DSPbuilder搭建的DDC，里面包括CIC滤波器，FIR低通滤波器，HB半带滤波器，NCO等，实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
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基于Xilinx FPGA实现的系数可装载数字滤波器源代码-Configurable Digital Filter Based on FPGA (using Verilog under Matlab 2008a)
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一种基于verilog的fir滤波源码，并带matlab仿真源程序。-Based on the fir filter verilog source code and source code with matlab simulation.
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matlab 仿真低通滤波器，然后用verilog硬件实现-using matlab to simulate a fir lowpass,
then using verilog to implement it.
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四抽头FIR滤波器matlab,verilog顶层，子模块，以及testbench代码-Four tap FIR filter matlab, verilog top, sub modules, as well as the testbench code
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本设计是基于FPGA的一个FIR低通滤波器设计，要求使用Verilog语言编写滤波器模块，通过编译和综合，并通过Matlab和modelsim联合仿真验证设计结果。-This design is a FIR low-pass filter design based on FPGA, use Verilog to program filter module, and joint simulation by Matlab and modelsim to validate the design re
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FIR滤波器的仿真，使用ISE软件verilog语言。其中滤波器系数为matlab产生的.coe文件，并产生testbench文件进行仿真。-FIR filter verilog coe testbench
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