搜索资源列表
DE2_LCM_TV_NTSC
- DE2上的基于FPGA视频开发资料第二部分-DE2 video
DE2_TV_PAL
- video信号pal制转vga输出，fpga verilong语言编写-fpga pal to vga ，writed in verilog
DE2_70_AUDIO
- 是用VERILOG HDL和NIOS II C/C++ 编的DE2-70板子的音频编解码芯片的使用工程-Is VERILOG HDL and NIOS II C/C++ code of the DE2-70 board in the audio codec chip, the use of project
FPGA-verilog
- 用Verilog语言编写的一些简单的FPGA入门实验，用ALTERA DE2开发板和Quartus_II软件开发环境。包括：流水灯实验、数码管显示实验-With Verilog language preparation some simple introduction experiment, with FPGA ALTERA DE2 development board and Quartus_II software development environment. Include water l
FPGA
- 本文采用FPGA来模拟实际的乒乓球游戏。本设计是基于Altera 公司的FPGA Cyclone II 芯片EP2C35 的基础上实现，运用Verilog HDL 语言编程，Quartus II 软件上进行编译、仿真，最终在Altera 公司的DE2 开发板上成功实现下载和调试-In this paper, FPGA to simulate the actual tennis game. The design is based on Altera' s FPGA Cyclone II EP
i2c-(2)
- de2 board using fpga plat form verilog code for i2c concept
DE2-VGA-LED
- verilog HDL 语言编写的，FPGA的数码管和VGA的显示。调用时不必修改源码，只需引脚映射对就可以-verilog HDL language, FPGA digital and VGA display. Call without having to modify source code, you can just pin on the map
clock_1Hz
- Clock 1Hz with duty cycle control for verilog for DE2-115 Altera FPGA
fpga-uart
- 基于DE2开发板的串口通信程序，使用Verilog HDL语言，-Serial communication program based on the DE2 board, using the Verilog HDL language
13_vga256
- Verilog code for display VGA coding for the DE2 Board of FPGA
RSA
- 基于FPGA的RSA加解密系统，通过FPGA验证代码为Verilog,开发板为DE2-115-RSA encryption and decryption system based on FPGA, through the FPGA verification code for the Verilog development board, DE2-115
Twofish
- 基于FPGA的Twofish加解密系统，通过FPGA验证代码为Verilog,开发板为DE2-115-Twofish encryption and decryption system based on FPGA, through the FPGA verification code for the Verilog development board, DE2-115
calculator
- 基于FPGA DE2开发板的计算器设计。Verilog语言编写。矩阵键盘输入，LCD1602显示。程序包括按键扫描模块、数值处理计算模块和LCD控制写模块等。-Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD module
SDRAM controller
- This SDRAM controller is useful for SDR_SDRAM IC's can be integrated with the verilog code. The code is developed for the altera FPGA's and it can be ported to other FPGA's easily. The code is verified with terasic DE2-115 board and DE2 boards.
OV7670_FPGA_DE2
- 基于Verilog语言的OV7670摄像头驱动，在DE2-115FPGA开发板上实现，显示还有点小问题-Based on Verilog language OV7670 camera driver, the DE2-115 implementation on fpga development board, shows that there are some small problems
HanoiTower
- 使用Verilog HDL 以及VHDL语言，运用FPGA中的VGA显示原理以及键盘控制原理，开发汉诺塔简易游戏(The use of Verilog HDL and VHDL language, the use of FPGA in the VGA display principle and keyboard control principle, the development of Hanoi simple game)
Zet-1.3.1
- 在单片FPGA上实现九十年代初期PC，可安装Windows3.1及其他DOS系统。SOC中包含以80286(cpu),中断控制器,显示控制器(VGA),声音控制器,PS2(鼠标，键盘)等。是了解计算机历史变迁及学习SOC设计的重要资料！(ZET aims to implement an early 90`s PC on FPGA.Which include a 80286(cpu),interrupt controller,display card(VGA),sound card,PS2 int
8051-master
- 设计兼容51的指令集的处理器架构 编写兼容51处理器的Verilog代码 仿真 验证测试处理器的功能和性能(The design includes a processor whose instruction set is compatible to the industrial standard 8051 and its FPGA implementation. Through the analysis of instructions, I determine the CPU inte
de2_build
- De2_build: It contains the FPGA configuration file of the comprehensive Nios II system in Section 16.10.2 and software image files for the DE2 board. These files can be used for quick demo or software development. Note that the files can only be us