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select7
- VHDL七人表决器免费为大家服务-VHDL seven people to vote for you for free!
ERFREE_COUNTER-vhdl
- maxplus2为开发环境 vhdl编写的自由 计数器 程序-maxplus2 VHDL environment for the development of free counter preparation procedures
dff
- 用vhdl编写的D触发器，锁存器等，不需帐号就可自由下载此源码-VHDL prepared using D flip-flops, latches and so on, no account can be a free download this source
ramvhdllib_06
- The Free IP Project VHDL Free-RAM Core-The Free IP ProjectVHDL Free-RAM Core
100Examples
- verilog 语言 可以免费下载的程序-Verilog language can be downloaded for free procedures
traffic_light
- 推荐题目要求：1.主、支路无车时主干路“绿”； 2.若主、支路均有车时，主干路绿45S,支路绿25S,绿灯结束时黄灯亮5S； 3.主、支路传感器信号用按键传递，高电平表示有车。-Recommended subject requirements: 1. Lord, slip-free car trunk road green 2. If the Lord, slip both cars, Green Trunk Road 45S, slip Green
P8051
- This a FREE tool chain which compiles C codes into 8051 binary code, converts the binary to RTL ROM, and simulate in Modelsim. SDCC is the compiler. Example compilation: cd compile sdcc --iram-size 0x80 --xram-size 0x800 t8051.c RE
shuzisuoxiang
- 数字锁相环(DPLL)技术在数字通信、无线电电子学等众多领域得到了极为广泛的应用。与传统的模拟电路实现的PLL相比，DPLL具有精度高、不受温度和电压影响、环路带宽和中心频率编程可调、易于构建高阶锁相环等优点。-Digital phase-locked loop (DPLL) technology in digital communications, radio electronics, and many other fields has been extremely wide range of
neek_alternate_sd_card_controller
- This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a
hex2rom_0241_Win32
- This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a
DP8051_FREE
- Free 8051 core upload
telephone
- 实现长途电话，市话的计时，还有免费电话 在verilog中用状态机实现-The achievement of long-distance calls, the city of the time, then, there are toll-free number in verilog state machine used to achieve
1204pointsFFT
- 1024点FFT VHDL实现,含有说明部分，自己好好理解，可自行修改-1024 point FFT VHDL realization that contain part of a good understanding of their own, they are free to modify
yuyincaiji
- 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
arm7verilog
- ARM 7 免费ip 核， verilog语言描述-arm7 free ip core, verilig DHL
Spartan3E_ADC
- 专门针对xilinx 的spartan3e开发板上的ADC转化的编程，绝对可用，仿真通过-Xilinx the spartan3e specific development board ADC conversion program, absolutely free, simulation by
fpga_usb_serial_20091006.tar
- 免费的usb2.0源码,支持Xilinx和Alteral的FPGA-USB2.0 free sources
cpu86
- CPU86 - Free VHDL CPU8088 IP core Copyright (C) 2005-2010 HT-LAB Quick run: 1) Open a DOSBox/Cygwin shell 2) Navigate to the web_cpu88/Modelsim directory. 3) Execute run.bat See website for more details. The CPU86 cor
freedev_ps2
- 自由电子科技的PS2键盘的avalon外设ip core-Free electronic technology avalon PS2 keyboard peripheral ip core
error-free
- i want verilogHDL and VHDL source coding.please help me-i want verilogHDL and VHDL source coding.please help me.......