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Lab_Timer and Timer Signals
- The goal of this lab is (1) to under the defects of software timers, (2) to write a periodic program without timers, (3) to write a periodic program using timer Hardware:Host computer PC Software: GNU GCC -The goal of this lab is (1) to
CC2430-3
- CC2430 基础实验三按键控制闪烁 本实验的控制比实验二的控制稍显复杂，这个实验中使用按键控制LED 或闪烁，或熄灭。-cc2430 lab three
DSP-c-Matlab-Programs-ManualV19
- 印度GURUNANAK ENGINEERING COLLEGE数字信号处理实验室的DSP+c+Matlab联合编程手册-DIGITAL SIGNAL PROCESSING LAB (IV-I SEM) INDEX 1. Architecture of DSP chips-TMS 320C 6713 DSP Processor 2. Linear convolution 3. Circular convolution 4. FIR Filter (LP/HP) Using Wi
Source-Code
- ADuC7060/ADuC7061 fully integrated, 24-bit A/D Microcontroller (3-Wire RTD Example Project) USB Based Temperature Monitor Using the ADuC7061 Precision Analog Microcontroller and an External RTD Link.... http://www.analog.com/en/
cpu86
- CPU86 - Free VHDL CPU8088 IP core Copyright (C) 2005-2010 HT-LAB Quick run: 1) Open a DOSBox/Cygwin shell 2) Navigate to the web_cpu88/Modelsim directory. 3) Execute run.bat See website for more details. The CPU86 cor
i-mup1-lab3x
- Multi programming Wind River Vxworks I Mup1 Lab 3
lab-tk1942-0001.pdf.tar
- INITIAL STEPS TO LOGIN INTO UBUNTU WORKSTATION 1. Boot into Ubuntu OS. Refer to your lab tutor on how to do this. 2. Login into the Ubuntu workstation using your supplied login and password. 3. Open Ubuntu’s terminal client by any of the metho
Video4Linux
- 实现了Video4Linux和USB摄像头驱动的静态加载；（2）库文件的交叉编译与移植，实现了JPEG的交叉编译与移植；（3）V4L的编程思想，实现了视频图像的采集；（3）帧缓冲设备的使用，利用帧缓冲设备实现图像的显示；（4）将摄像头采集的BRG流转为RGB流，实现图像的正常显示以及JPEG格式图片的保存。(实验报告里面包含详细的代码)-Achieved and the USB camera driver Video4Linux static load (2) cross-compiled l
main_prog_lcd
- PIC16F690上接LCD 1602A的显示驱动 Set these pins to outputs: PORTC: RC0 -> PIN 11 (DATA, DB4) RC1 -> PIN 12 (DATA, DB5) RC2 -> PIN 13 (DATA, DB6) RC3 -> PIN 14 (DATA, DB7) RC4 -> PIN 6 (E) RC5 -> PIN 4 (RS) LC
lab3
- VHDL Lab 3 – Arithmetic & State Machines In this lab we will look at arithmetic circuits that add, subtract, and multiply numbers. Each type of circuit will be implemented in two ways: first by writing VHDL code that describes the require
DESIGNS-WITH-VHDL
- Lab sheet for VHDL language contain six different experiments 1 introduction to vhdl 2 data flow modelling 3 sequential modelling 4 structural modelling
FPGA-Train
- FPGA基础培训，包括： FPGA基本架构 Xilinx工具流程 实验1：Xilinx工具流程演示 实验2：架构向导和PACE 实验3：全局时序约束 实验4：合成技术 实验5：CORE Generator系统 实验6：利用ChipScope-PRO-Basic FPGA Architecture Xilinx Tool Flow Lab 1: Xilinx Tool Flow Demo Architecture Wizard and PACE L
Altera-Lab-3
- Altera Lab 3 for DE1 - Manual and Solution
LAB-3
- 用FPGA实现对键盘的控制，整个工程全了，打开即可运行。-FPGA to achieve control of the keyboard, the whole project is all open to run.
LAB3
- THAT IS SOLUTION FOR THE LAB OF DSD LAB 3
Lab6.3
- code test LAB Embeded system
Smart-Lab---Master
- 物联网智能实验室系统 该代码由Arlyb编写！ 采用KEIL，STC12C5A60S2为开发环境！ 代码实现功能： 1、主机由控制器和网络接口以及NRF905无线传输组成，可实现接收传感器模块的传感信息 并且经过控制器处理，传送给电脑上位机，上位机可实现监控仪以及远端控制！ 2、传感器部分主要由光强传感器、雨水传感器、温湿度传感器、霍尔传感器、烟雾传感器等 组成，信息通过无线传送回主机！ 3、输入检测部分由键盘、显示屏以及无线组成，使用者通过在网页登陆申请账
FuIP2.3-beta1
- 未来之家实验室，开源单片机专用TCP/IP协议栈，FuIP2.3版，增加自动获取IP功能模块。同时数据包长度可以超过255及以上了。如果需要在外使用互联网，在家使用局域网均可控制，请到官网查看。详情Fuhome.net-Fuhome.net-Future home lab, open-source microcontroller dedicated TCP/IP protocol stack, FuIP2.3 version, increase automatically obtain IP m
Lab 6 UART_RS232
- 基于MSP430f5529的串口程序，能在墨水版上输出(We will use USCI_Ax module with UART mode, Timer_A module, and TFT display. 1. Configure UART mode 2. Initialize E-ink screen (TFT) display 3. Configure Timer_A for interrupt Transmit one character through UART every o
lab3
- lab 3 system generator : Signal Routing