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N-0.5fenpinqi
- vhdl N-0.5分频方法设计，可以输入任意数值N，即分得到N－0.5的频率。-vhdl N - 0.5-frequency method, we can input arbitrary numerical N, namely, to be N - 0.5 frequencies.
BCH(n=1023;k=1013)
- 实现BCH编译码(n = 1023 k = 1013） 供参考
N-PLC(pdf)
- 富士N系列可编程控制器PLC编程手册,介绍Flex N系列PLC的情况和其操作。
gen_nx64k
- N×64K数控分频模块，可将2.048M时钟分频为一个NX64k的时钟，在E1复用设备上应用。 -N × 64K NC frequency module can be 2.048M NX64k clock frequency for a clock, the E1 multiplexing equipment apply.
lab7
- 在這個實習當中，我們學習利 用 Hierarchical VHDL code 的方式，來 實現一 個n-bit 的ripple-carry adder，並學習使用package。-In this practice among the profit we can learn to use Hierarchical VHDL code the way to achieve an n-bit future of the ripple-carry adder, and lea
RS9110N1122EVB
- The RS9110-N-11-21 module from Redpine s Connect-io-n™ family of products is a complete IEEE 802.11bgn Wi-Fi client device with a standard seria or SPI interface to a host processor or data source. It integrates a MAC, Baseband p
Tips-n-Tricks-Comparator-PIC-MCU---Microchip
- Tips n Tricks Comparator PIC MCU - Microchip-Tips n Tricks Comparator PIC MCU - Microchip
N-GY26-maual
- 电子罗盘 开发与应用 软件工程师 -Compass Development and Application Software Engineer
m-operand-n-bit-adder
- n bit m operand adder
N-jishu-fenpin
- N倍奇数分频器源码,可根据需要修改N数字即可-N times odd divider source
n-bit
- n bit parity generator is a versatile program that adds parity bits for any length of data the user enters . It accurately adds parity bits on the MSB and solves the problem during any kind of digital communication protocol
N-bits-by-M-bits
- 这是一个verilog代码实现的常用乘法器。设计的是通用N比特乘M比特的二进制乘法器-This is a common multiplier verilog code. Design of a generic N bits by M bits of the binary multiplier
ADC-n-channel
- MSP430 多通道 ADC采样，并通过usart 与PC端收发数据-MSP430 n-channel adc, usart
modulo-2^n-2^k-1-adder
- 用Verilong语言编写的模2^n-2^k-1加法器，该加法器多用于基于余数系统的蒙哥马利模乘运算。 -Implementation of modulo 2^n-2^k-1 adder Using Verilog.This adder can be use for RNS Montgomery Multiplication
RS9110-N-11-2X-SPI_TEST-V4.7.1
- M0单片机采用SPI接口与WIFI模快RS9110-N-11-2X的无线数据通信程序-M0 microcontroller with SPI Interface and WIFI module RS9110-N-11-2X fast wireless data communication program
RS9110-N-11-2X-UART_TEST-V4.7.1
- M0单片机采用UART接口与WIFI模快RS9110-N-11-2X的无线数据通信程序-M0 microcontroller with UART Interface and WIFI module RS9110-N-11-2X fast wireless data communication program
N-DtoA-VHDL-AMS
- 下面是一个混合信号的例子,是一个N位D/A转换器的VHDL-AMS描述-The following is an example of a mixed signal that is a N bit D/A converter described in VHDL-AMS
2^n-divor
- 2的n次方分频设计，可以实现任意分频。使用verilog编写-n th power of 2 crossover design, you can achieve any frequency. Use verilog to write
74HC595(N)
- 网上关于595的级联参考很多，但真正做到N个级联的都没，而且他们几乎都忽略了，OE使能输出，本程序实现50个595的级联，希望对大家有帮助-c keil 74hc595
N-BitParallelLoadShifRegister
- N Bit ParallelLoadShiftRegister