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qdmatest
- QDMA演示程序，带中断服务程序的，是不可多得的DSP程序参考例子-quad division multiple access demo program, with a break in service procedures, is a rare example of DSP reference procedures
EDMAQDMA
- 在CCS下使用EDMA和QDMA传输数据，适合c6000DSP系列-use EDMA quad division multiple access and transmission of data, suitable for c6000DSP Series
double_mux4_1
- 设计一个双四选一的数据选择器电路 设计要求： （1）双四选一的数据选择器的电路框图如图3.2.3所示，试写出设计块对其逻辑功能进行描述。 -Choose a design of a dual quad data selector circuit design requirements: (1) a double four selected data selector circuit diagram shown in Figure 3.2.3, try to write the
AD-DA
- 实现PCF3591四路ADC转换和一路DAC转换程序，并将转换后的结果在8段数码管上显示。-ADC conversion and achieve PCF3591 Quad DAC conversion process all the way and the results converted 8 digital tube display.
STM32-V3.5-DAC7617E-07.26
- STM32驱动TI芯片DAC7617，DAC7617是四通道12位电压输出数模转换器，串行接口-STM32-driven TI chip DAC7617, DAC7617 is a quad 12-bit voltage output DAC, Serial Interface
QUAD-SPI-verilog
- 难得的SPI NOR Flash控制器Verilog源代码，支持四路串行通道！-Rare SPI NOR Flash controller Verilog source code, supports four serial channels!
02C-xxx_Rev2.2
- tw2824 c源码，techwell公司的tw2824四分割源码，供参考。-tw2824 c source code, techwell tw2824 quad source for reference.
QuadD
- 四路D型触发器 这个例子表明一个条件任务状态能够怎样被使用来描述连续的逻辑-Quad D-Type Flip-flop This example shows how a conditional signal assignment statement could be used to describe sequential logic
74
- 7400 QUAD 2-INPUT NAND GATES 与非门 7401 QUAD 2-INPUT NAND GATES OC 与非门 7402 QUAD 2-INPUT NOR GATES 或非门 7403 QUAD 2-INPUT NAND GATES 与非门 7404 HEX INVERTING GATES 反向器 7406 HEX INVERTING GATES HV 高输出反向器 7408 QUAD 2-INPUT AND GATE 与门 7
PACKAGE
- CDIP-----Ceramic Dual In-Line Package CLCC-----Ceramic Leaded Chip Carrier CQFP-----Ceramic Quad Flat Pack DIP-----Dual In-Line Package LQFP-----Low-Profile Quad Flat Pack MAPBGA------Mold Array Process Ball Grid Array PBGA-----Plas
DACmax525
- DAC max525 四路模拟转数字转换芯片MAX525的驱动程序-DAC max525 Quad Analog to digital conversion chip MAX525 driver
xapp737
- xapp737 from xilinx website : SPI-4.2 to Quad SPI-3 Bridge in Virtex-4 FPGAs
xapp525
- xapp525 from xilinx website: SPI-4.2 to Quad SPI-3 Bridge
qiangda
- EDA课程设计，是四路智力抢答器的vdhl程序，里面还有我自己录课程视频。仅作为参考！-EDA curriculum design, is a quad of vdhl intellectual Responder program, which was recorded courses and my own video. Only as a reference!
405-2schematic
- amplifier Quad 405-2 schematic-amplifier Quad 405-2 schematic
xr16c864
- xr16c864 source code to initialize the quad uart. source code contains quad uart initialization and communication between them
quaddecoder_verilog_ise11.2_used_09042010
- Two simple Quadrature decoder and Counter build in a XILINX XC9536 CPLD. This Core is coded in Verilog and contains the compete Project file and the fitted quad.jed File. The Pinout is descr ipted in the Constrained file quad.ucf. To use them, y
ans
- 数字式竞赛抢答器 实现功能 1.四路抢答功能，带抢答超时和答题超时功能； 2.计分显示功能，每组对应两个数码管，能显示0-99的分值，复位初值为10。 -Digital Competition Responder features a realization. Quad Responder function, with time out and answer time-out function Responder 2. Scoring display, each corres
quad-responder
- 四路抢答器，可供四名选手参加比赛的智力竞赛抢答。选手按下按键后，其他选手按下无效，同时对应的指示灯亮，蜂鸣器发出音响。由主持人控制指示灯和蜂鸣器复位。-Quad Responder, for four players to participate in quiz competition Responder. Press the key players, other players press the invalid, while the corresponding indicator light
quad
- 4画面分割器源码 ，用NVP1004编解码。51单片机控制。-The 4 Quad source, NVP1004 codec. 51 MCU control.