搜索资源列表
DDR（双速率）SDRAM控制器参考设计verilog代码
- DDR SDRAM reference design documentation
SDRAM verilog
- 基本包涵主流SDRAM控制器 verilog语言
通用SDRAM编程核心资料代码
- 通用于FPGA控制SDRAM编程核心资料代码，给出了验证实用的 Velogic代码。有很高的实用价值！
ref-ddr-sdram-verilog.zip
- sdram的verilog的源码实现,sdram verilog source code realizes
(fpga)sdram.rar
- verilog 代码，读写SDRAM 不带仿真，需要自己编写测试文件,Verilog code, read and write SDRAM simulation without the need to prepare their own test documentation
DDR2 SDRAM 控制器的FPGA实现
- DDR2 SDRAM 控制器的FPGA实现,DDR2 SDRAM controller FPGA to achieve
SDRAM.rar
- 瑞芯科技EFX400SL开发板上使用ISE创建的SDRAM控制器的工程源码,Rockchip EFX400SL technology development board created by the use of ISE projects SDRAM controller source
SDRAM-control
- SDRAM控制器的Verilog源代码，主要用于SDR-SDRAM-SDRAM controller
sdram-source
- SDR SDRAM 控制器的源代码 altera公司的-source code from altera
sdram-control-verilog
- SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.
SDRAM
- SDRAM控制器，Verilog代码编写，让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和学习笔记-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
SDRAM-HY57V641620
- SDRAM-HY57V641620中文资料-SDRAM-HY57V641620
SDRAM
- 用FPGA实现对sdram读写的源代码，芯片用的是Altera公司的，需要的同学可以看看！-FPGA realization of sdram read and write the source code, the chip using Altera' s, students need to take a look!
SDRAM
- 基于TI 6416DSP的sdram读写程序-Based on the TI 6416DSP procedures sdram read and write
ref-sdr-sdram-verilog
- SDRAM的vegilog代码，做一个SDRAM的封装成为SRAM一样进行操作。一个顶层文件下由三个模块-SDRAM
ref-sdr-sdram-verilog
- 标准SRD SDRAM控制器参考设计，altera提供 Verilog代码,带有使用手册，大家试试交流一下 -Standard SRD SDRAM controller reference design, altera provide Verilog code, with user manual, we try to exchange some
ref-ddr-sdram-vhdl
- 基于VHDL编写的DDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
ref-sdr-sdram-vhdl
- 基于VHDL编写的SDR-SDRAM控制器的编程，目前是业界常用的RAM控制器-VHDL prepared based on the SDR-SDRAM controller programming, is now commonly used in industry RAM controller
sdram
- artera 的一个SDRAM 模型（verilog）-artera an SDRAM model [verilog]
AlteraSDR-SDRAM
- Altera 官方提供的SDRAM控制器,verilog的-SDRAM controller provided by Altera in Verilog HDL