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电磁兼容性
- moto的电磁兼容性讲座，好东西啊 板卡级电磁兼容性设计 板卡级电磁兼容性设计 -moto electromagnetic compatibility talks, something good ah-board EMC design board-level electromagnetic compatibility de sign board-level electromagnetic compatibility design
mul_sign123
- P18F4610是8位单片机的乘法程序是无符号的16*16C嵌入汇编的．MCC18编译器．-P18F4610 8-bit MCU is the multiplication process is no sign of the 16-16C embedded in the compilation. MCC18 compiler.
c_fusejiance
- 此程序使用的集成环境为TI公司的CCS。程序的平台是使用合众达的VPMDM642 c_fusejiance是用DSP进行肤色检测。人体的皮肤颜色是人体的一个重要特征，肤色检测被广泛的应用于人脸跟踪、人脸检测、手语识别、敏感图像过滤等领域中. -use of this procedure for the integrated environment TI's CCS. Procedures for the use of the platform is up to the UCO i
FCT310B
- 太阳能热水器源程序详细说明，包含个标志位和寄存器详细说明-solar water heater program details, including a sign-and register details
DM642_Complexiondetect
- 在DM642平台上实现的肤色检测程序.肤色检测被广泛用于人脸跟踪、人脸检测、手语识别等领域中，具有重要的实际应用价值。-DM642 platform in achieving the color detection procedures. Color has been widely used to detect human face tracking, Face detection, sign language recognition, and other areas, is of great
TX-1BDS18B20
- //通过18B20检测的数字温度可在电脑上显示当前温度值 #include <reg52.h> #define uchar unsigned char #define uint unsigned int sbit DS=P2^2 //define interface uint temp // variable of temperature uchar flag1 // sign of the result positive or negative sbit
asd
- MP3播放器是利用数字信号处理器DSP（Digital Sign Processer）
accumulator.rar
- 实现累加器的verilog源码，广泛应用在通信电路设计中,The realization of accumulator Verilog source, widely used in communication circuit design
DAC_test.rar
- 是关于C8051F020的12位DAC0测试程序，改程序已经通过了测试。非常好用，谢谢大家顶顶,The Chinese characters has cosmos spirit, close to a source head and live close to nature.Sign at its side, such as alongside one stone, one tree, one source, the person is more simple, dark vast space.
xwwj2
- 呼叫器接收机源程序，用24c01存储呼号器号码接收到信用用89s52解码。并在24c01中读出序号显示出来-Pager receiver source, using call sign 24c01 memory device receives a number of credit with the 89s52 decoding. And 24c01 read out the serial number is displayed
PACK
- a51 令牌通讯-a51 makes the sign communication
EX
- Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge.
1_LAB
- Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge.
Multi11Mulply
- 本程序是11位带符号位的乘法器，其中最高位为符号位(sign)，中间7位是指数部分(Exponent)，最后3位是尾数(Matissa)。表示数据的范围是-2^-63-----+2^64.该工程文件有完整的程序，以及波形,验证正确。-This procedure is the unsigned 11-bit multiplier, one of the highest for the sign bit (sign), are between 7 part Index (Exponent), th
114916802
- 路径识别是体现智能车智能水平的一个重要标志，而传感器是智能车进行路径识别的关键检测元件。针对智能车在特殊路径与传感器数目限制的条件下的路径识别，提出了基于红外传感器的路径识别方案与基于图像传感器的路径识别方案，并对两种方案的应用性能进行了比较。通过将基于面阵图像传感器的路径识别方案应用于第一届“飞思卡尔”杯全国智能车竞赛并取得优异成绩，验证了该方案的可行性与有效性。 -Path to identify the smart cars are smart level reflected an i
Timer16BitOneShot
- 基于《Stellaris外设驱动库》的例程： 定时器16位单次触发定时示例 本实验演示了如何将定时器仅产生一次中断，用TimerFlag作为是否进入过中断的标志。在中断处理函数中，置位TimerFlag，从而熄灭LED1。 -Based on " Stellaris peripheral driver library" of routines: 16-bit timer to trigger a single sample from time to time in
lunwen
- 潘明海 刘英哲 于维双 (论文) 中文摘要： 本文讨论了一种可在FPGA上实现的FFT结构。该结构采用基于流水线结构和快速并行乘法器的蝶形处理器。乘法器采用改进的Booth算法，简化了部分积符号扩展，使用Wallace树结构和4-2压缩器对部分积归约。以8点复点FFT为实例设计相应的控制电路。使用VHDL语言完成设计，并综合到FPGA中。从综合的结果看该结构可在XC4025E-2上以52MHz的时钟高速运行。在此基础上易于扩展为大点数FFT运算结构。 -Pan Mingha
Traffic_Sign
- 一个基于LPC2131的交通标志牌点阵显示屏程序，能够自适应显示相应限速等标志-A traffic sign on LPC2131 dot matrix display program can display the appropriate speed limits and other signs adaptive
led-sign-board
- LED sign board code used for LED matrix sign board for scrolling. its working
sign-magnitude-adder
- this is vhdl code of sign-magnitude-adder