北斗、GPSC/A码生成器的verilog ，输出速率可调，使用verilog编写- FPGA-based GPS receiver complete code of the spreading code generator design using verilog language

通信扩频码GOLD码序列的产生，码长度可以手动设置，VHDL语音实现。-GOLD generate communication code sequence spreading code, the code length can be set manually, VHDL voice implementation.