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用verilog写的跑表程序--Stopwatch program written by verilog.
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基于verilog-HDL的电子秒表电路，采用quartusII72编译仿真，经下载测试通过。-Verilog-HDL-based electronic stopwatch circuit simulation using quartusII72 compiled by downloading the test.
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Verilog 编写的 秒表程序，在数码管上显示，带有清0和暂停键-Stopwatch Implemented by Verilog hdl
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verilog 完全集合了电子表所拥有的功能，计时，调时，秒表，闹钟四个功能-verilog completely owned by a collection of spreadsheet functions, timing, tone, the stopwatch, alarm clock features four
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一个基于FPGA用verilog HDL 编写的数字秒表已经LED灯的配合-LED lamp with a digital stopwatch has been prepared based on the FPGA using verilog HDL
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Verilog编写的多功能秒表，Quartus仿真及硬件测试通过。-Verilog prepared by the multi-function stopwatch, Quartus simulation and hardware testing through.
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由verilog编写的秒表程序，按键控制 按下一键秒表停止 按下另外一键 秒表又运行-Verilog prepared by a stopwatch program, press a button control key pressed another button to stop the stopwatch stopwatch and run
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自己用verilog语言编写的数字钟程序，能在Alter公司的DE0板上完美运行，能时间计时，日期，闹钟，秒表的功能。
欢迎交流学习。-The digital clock program which developed by verilog language can run at Alter DE0 board, to the time time, date, alarm clock, stopwatch function.
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