FPGA边界扫描时的TAP控制器，这个是工程文件，带有modelsim仿真-FPGA boundary scan when the TAP controller, this is a project file with modelsim simulation

JTAG调试接口与testbench，附加memory模块并支持cpu和wishbone-JTAG TAP with Controller and testbench ,and an addition of block memory and the potential support of cpu and wishbone

基于USB接口的边界扫描测试控制器设计,很实用，值得参考。-jtag tap controller