搜索资源列表
calendar_clock
- 用verlog HDL写的电子日历,可以显示年,月,日和时间,具有闹铃的功能-using HDL to write electronic calendar, it shows the year, month, day and time, with alarm function
ASCI_TRAFFIC_LIGHT
- 用VERLOG实现交通灯程序，有红绿两种灯，绿灯到红灯，路灯闪10秒，可以调整红绿灯持续时间-VERLOG achieve with traffic lights procedures, two black lights, the green light to red lights, flashing lights for 10 seconds, can be adjusted duration of traffic lights
QPSK2154
- QPSK的VERLOG源码，在MODELSIM下的一个工程，有测试向量。-QPSK VERLOG source of the MODELSIM of a project, test vector.
dll11254
- 数字琐相环DPLL的VERLOG代码，MODELSIM下的工程，有测试文件-digital phase-locked loop DPLL VERLOG code MODELSIM under the projects, a test document
color_space_converter
- verlog 编程 色彩空间转换 有测试文档-verlog programming color space conversion is testing documents
EDA_clock1
- 电子秒表电路，可在开发版上下载运行，verlog开发-electronic stopwatch circuit may download the development version running verlog Development
digital_clock
- 用verlog语言编的一个很好的综合实验,特别适合于FPGA/CPLD的初学者-verlog language with a good addendum to the comprehensive experiment, particularly suitable for FPGA / CPLD beginners
traffic_lamp
- 用verlog语言编的又一个很好的综合实验(交通灯的控制),特别适合于FPGA/CPLD的初学者-verlog language used is an addendum to the good of the experiment (traffic light control), particularly suitable for FPGA / CPLD beginners
verlog_basic
- 用verlog语言编的一些基础实验,适合于FPGA/CPLD的初学者。内容包括8位优先编码器，乘法器，除法器，多路选择器，二进制转BCD码，加法器，减法器等等。-verlog used some language addendum to the basic experiment, which is suitable for FPGA / CPLD beginners. Including eight priority encoder, multipliers, dividers, multi-p
spi
- spi协议的FPGA实现(Verlog).
adder
- 此程序为用VERLOG HDL编写的一个完整的3位加法器。
an487_design_example
- 用verlog hdl开发的SPI 的源码
examples
- verlog编程135例，对于初学者很有帮助-135 cases of programming verlog, very helpful for beginners
UART
- UART verlog 源码-UART verlog.......................
1578201128
- Its verlog/vdhl ebook
usb_wr_Verilog
- fpga ubs通讯模块 verlog语言 使用EZ-USB FX2-USB interface. use EZ-USB FX2 carry out PC communication with FPGA by USB.
Verlog
- 一些有用的Verilog程序，包含许多简单的模块，适合初学者入门学习-Some useful Verilog program, including a number of simple modules, suitable for beginners to learn entry
UART
- UART receiver transmitter verlog code
FPGA-verlog-SRAM
- FPGA verlog SRAM -FPGA verlog SRAM aaaaaaaaaaaaaaaaaaaaa
pinlvji Verlog
- 恒精度频率计的Verlog可综合代码采用时钟频率为2MHz，不同的时钟频率需要修改相应的参数。(Constant precision frequency meter Verlog can be integrated code, using a clock frequency of 2MHz, different clock frequency needs to modify the corresponding parameters.)