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实现PS/2接口与RS-232接口的数据传输，
可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。,The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received ch
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PCI的FPGA实现，使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
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This usefull source for control CIS Sensor
and has fallowed functions
1) Read image data frome 3channel 200dpi CIS Sensor
2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition
3)Psudo Video Ram Read by
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VHDL, the transfer of data types
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程序将通过rs422接口传进来的16bit数据转成串行输出的数据-Program will pass through the rs422 interface 16bit data transfer incoming data into a serial output
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4输入，4输出，clos网络所用，有利于连接处理器和处理器，处理器和存储器传输数据。-4 inputs, 4 outputs, clos network use is conducive to connecting the processor and processor, processor and memory to transfer data.
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实现spi接口的传输，并多外接EEPROM读写数据-Spi interface to achieve the transfer, and multiple external EEPROM read and write data
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这是spi接口传输的一部分内容，本源码一共三部分，功能：spi接口的的实现即对外设的读写数据-This is the spi interface transfer part of the contents of a total of three parts of this source, function: spi interface that the realization of the read and write data to the peripheral
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单芯片 USB 转 UART 数据转换器
- 集成的 USB 收发器无需外部电阻
- 集成的时钟无需外部振荡器
- 集成的 512 字节 EEPROM 用于为供应商代码产品代码序列号功率标牌版本号和产品描述等数据提供存储空间
- 片内上电复位电路
- 片内电压调节器3.3V 输出
USB 功能控制器
-符合USB 规范 2.0 全速 (12 Mbps)
-通过SUSPEND 和 RI 引脚支持的USB中止状态-Single-Chip USB to UART Dat
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实现了FPGA以SPI协议传送和接受16位数据。传送过程无需Nios核干预-SPI protocol to achieve the FPGA to send and receive a 16-bit data. Nios nuclear transfer process without intervention
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使用68013的测试程序，包含68013固件程序-use of cy7c68013,data transfer from usb to pc.
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This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
3 port 8bit s wide Mux
-This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
3 port 8bit s wide Mux
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This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
2 port 8bit s wide Mux
-This source are usefull function in VHDL
for Transfer MCU Data betwine FPGA
2 port 8bit s wide Mux
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使用硬件描述语言 VHDL 编程：
红外线传输系统包括发送方和接收两端，都可以单独进行初始化清零处理。在可以设置准备发送的 8bits 8bits8bits 的数据信息，连同一个偶校验位起发送。接受端收到 的数据信息，连同一个偶校验位起发送。接受端收到 8bits的数据信息和一位偶校验后，显示接 收到并根判定的数据信息和一位偶校验后，显示接 收到并根判定的数据信息和一位偶校验后，判定收到的信息是否出错。-Infrared transmission system including the s
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It is a VHDL code for the operation of file reading by IEEE commands which can transfer the multiplr data
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usb serial core is a vhdl synthesizable code, implementing serial data transfer over usb. Combine with a UTMI-compatible transceiver chip, this core acts as a USB device that transfers a byte stream in both directions over the bus
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VHDL代码实现FIFO从ROM中读取数据然后传输到RAM中-VHDL code for FIFO read data ROM to RAM and then transfer
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Interface TCD1209DG with Altera FPGA and transfer image data to PC via USB using USB FX2 Slave FIFO mode, Only FPGA code included.
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Least-squares algorithm to fit a three-dimensional plane, Data packet transfer source program, Much posture, multi-angle, have different light.
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