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wb-cpu
- 该套软件用于提取王码98（或者其他版本）的五笔数据，精简后应用于嵌入式系统，如单片机。在DOS下，用TC模拟调试通过。很容易移植到单片机上。含五笔数据提取过程，输入时两分法查找的子程序。全部为C代码-the software used to extract Wangma 98 (or any other version), the five data streamlined used in embedded systems, such as SCM. In DOS, using simulati
pci.tar.gz 完成WB BUS和PCI bus之间的传输
- verilog编写的PCI总线，提供了Wishbone bus和PCI local bus之间的接口，内由两个独立的模块组成，分别完成WB BUS和PCI bus之间的传输,The PCI IP core (PCI bridge) provides an interface between the WISHBONE SoC bus and the PCI local bus. It consists of two independent units, one handling transact
WR-WB-UserGuide-3.1
- Wind River WorkBench Users Guide 3.1-Wind River WorkBench Users Guide 3.1
AMRWB
- 基于ARM平台的AMR WB编码源代码，对速度进行了优化，可直接使用-ARM-based platform, AMR WB encoder code has been optimized for speed, can be used directly
wb
- 74ls138与74ls164组成的数码管显示系统-74ls138 with the composition of 74ls164 digital tube display system
pif2wb_latest.tar
- This is a bridge IP core to interface the Tensilica PIF bus protocol with the OpenCores WishBone. It currently supports single-cycle as well as burst transfer operations. The core has been tested in a master-PIF slave-WB configuration.-This is is a b
I2Csrc
- source I2c controller WB uC bus plus alternative controlling- verilog code
123
- 16*32的点阵显示源程序和protues仿真-wb
wb_async_mem_bridge_latest.tar
- wb_async_mem_bridge_latest.tar.gz- it is controller without independents sources clock . Only write or read case synchronization for WB controller interface bus.(computable with WB interface protocol).-wb_async_mem_bridge_latest.tar.gz- it is control
LCD-core
- 基于wb总线 的 支持16*2的LCD驱动-based on wb bus lcd
21xx_gsg(wb)
- analog device ADSP developement tools and descr iption - various
pci_to_wb_latest[1].tar
- 该ip核实现了容量为16MB的、双字、可寻址存储镜像与wishbone总线的连接-This core implements a 16 MB DWord-addressable memory image in the Wishbone bus (so WB width is 32 bit). Its functionality is reduced to the minimum which is required by the PCI specification (and I m really t
register
- 采用Verlog编写的仿8086通用寄存器。包含了AX,BX,CX,DX,BP,SI,DI,SP八个通用寄存器，并且前四个可通过W-B选择为高八位或低八位-With Verlog written in imitation of 8086 general-purpose registers. Contains the AX, BX, CX, DX, BP, SI, DI, SP eight general purpose registers, and the first four by the W
AN332Ver0.2
- 本资料包涵Si4704/05/06/1x/2x/3x/4x资料，及驱动程序，应用实例-This document provides an overview of the programming requirements for the Si4704/05/06/1x/2x/3x/4x FM transmitter/AM/FM/SW/LW/WB receiver. The hardware control interface and software commands are detailed
pci_to_wb_latest.tar
- PCI slave to WB master
XY-WA与XY-WB网盘资料
- STM8和51驱动LT8900的代码，含原理图(STM8 and 51 drive LT8900 code, including schematics)
wb_handler-1.0.1.tar
- wishbone ctrl for fgpa - wb handler
PipelineCPU
- 1. understand how to improve CPU performance 2. master the working principle of pipelined MIPS microprocessor. 3. understand the concept of data adventure, control risk and the solution of pipeline conflict. 4. mastering the testing method of pipe