搜索资源列表
inverterPLL
- 逆变器软件锁相环，可是现在逆变器 输出电流与市电电压的同频同相-Software phase-locked loop inverter
LPC2103_PLL
- EARYARM7_LPC2103最小系统板PLL锁相环测试程序，编程环境ADS1.2-Minimum System EARYARM7_LPC2103 board phase-locked loop PLL testing procedures, programming environment ADS1.2
EX10-PLL
- \Keil_ARM 基础实验Examples 锁相环 程序 实例-\ Keil_ARM basis of experimental phase-locked loop program example Examples
EX23-AtoD
- \Keil_ARM 基础实验Examples AD转换 程序 实例-\ Keil_ARM basis of experimental phase-locked loop program example Examples
PLL
- 三相数字锁相环pscad仿真 dq算法 PI控制-Three-phase digital phase-locked loop simulation in pscad
SCI
- MC9S12的SCI中断接受函数，包括锁相环设置，SCI接口初始化，中断处理函数-MC9S12 SCI interruption function, including phase-locked loop setting, SCI interface initialization, interrupt handler
ADF4001
- 用于锁相环PLL的ADF4001/ADF4002的底层驱动。-For the phase-locked loop PLL is ADF4001/ADF4002 the underlying driver.
ADPLL
- verilog语言编写的fpga的全数字锁相环ADPLL程序-Verilog language FPGA all digital phase-locked loop ADPLL program
7-STM32_f1_MAX 2871
- 2017年全国大学生电子设计大赛一等奖代码，实现AGC、锁相环等功能(The first prize code of the National College Students' Electronic Design Contest in 2017, the functions of AGC, phase locked loop and so on are realized)