基于FPGA流水线CPU控制器的设计与实现：在FPGA上设计并实现了一种具有MIPS风格的CPU硬布线控制器。-FPGA design of a pipelined CPU：a hard-wiring CPU controller with a MIPS-style is designed in FPGA.

设计并通过modelsim仿真软件实现了一个可以在FPGA平台上运行的8位RISC的CPU软核-Design an 8-bit RISC CPU soft core on an FPGA platform and simulate it using ModelSim

用cpu下载fpga的目标文件（XXX.bin）到fpga（从串模式，省掉了fpga配置芯片）-(String pattern, and to cut a the the cpu download fpga target file (XXX.bin) to fpga fpga configuration chip)