搜索资源列表
ARMCORE
- 用verilog语言实现的ARM7处理器的标准内核的源代码程序,nnARM, 具有很好的参考价值-using Verilog language of the standard ARM7 processor core source code procedures nnARM, who have a good reference value
leg_source
- verilog hdl编写,六段流水线CPU.程序完整，功能强惊。分为多模块编写-verilog hdl prepared replace pipelined CPU. The integrity of the process, strong function scared. Divided into multiple modules prepared
RISC_Core.ZIP
- 这是一篇关于8位RISC CPU设计的文章，其中包含了用Verilog语言编写的CPU内核程序
mips_verilog.rar
- verilog语言实现的基于MIPS体系结构的微处理器程序，一个时钟周期执行一条指令。,verilog language MIPS-based microprocessor architecture, an implementation of a clock cycle instructions.
OV7620
- 这是我自己编写的FX2控制ov7620的VERILOG程序，网上很难找的-This is my own written FX2 control ov7620 the VERILOG program, very difficult to find online
async-receive
- 通讯verilog程序，主要是接受部分，传输速率为192-Verilog communications procedures, the main part is to accept
arm_moni
- verilog 程序，用于通讯系统测试，输入40MHz时钟，40倍分频之后，输出1Mhz时钟-verilog procedures for communication system testing, 40MHz input clock frequency to 40 times, the output clock 1Mhz
8051Verilog_code
- 8051内核的Verilog程序实现，完成普通的单片机8051内核功能.包含综合后文件和测试文件-The 8051 kernel Verilog program complete ordinary microcontroller 8051 kernel function. Contains comprehensive post files and test files
example15-I2C
- I2C协议，又称两线协议，该程序是板子上的I2C通信接口代码，用verilog风格的代码 -I2C protocol, also known as two-wire protocol, the program is on the board I2C communication interface code, verilog code style
source
- 快速傅里叶变换verilog程序,其中包含了多个模块，全部在芯片了就可以实现，不用查找表-Fast Fourier Transform verilog program, which contains a number of modules, all in a chip can be achieved without a lookup table
dac7728_unit
- DAC7728的控制程序，经过顶层封装程序，可对此代码进行参数配置，实现芯片控制输出的功能。-the verilog file of controlling DAC7728
ADPLL
- verilog语言编写的fpga的全数字锁相环ADPLL程序-Verilog language FPGA all digital phase-locked loop ADPLL program
dpll3
- 数字锁相环 VERILOG语言编写的基于FPGA平台的PLL程序-VERILOG language based on the FPGA platform PLL program
uart
- FPGA 串口发送程序，基于verilog HDL，对于串口调试还是很有帮助的哦。-FPGA serial transmission program, based on verilog HDL, or helpful for debugging serial oh.
CPU
- 用Verilog实现的 哈佛结构的简单指令集CPU程序，由ALU、地址译码器、指令译码器等部分组成-Part of a simple instruction Verilog realize the Harvard architecture CPU program set by the ALU, address decoder, an instruction decoder, etc.
jishuqi
- 这是Verilog写的，一个计数器的程序代码，以及测试文档-This is written by Verilog, a program code for the counter, and a test document
16 bit signed number multiplier
- 16位有符号数乘法器，使用Booth编码和华莱士树，提供程序源文件和测试文件(The 16 bit signed multiplier uses Booth encoding and Wallace tree to provide source files and test files.)