搜索资源列表
4046PLL
- 采用4046实现的10m以下信号的锁相环 电路图。-used to achieve the 4046 10m below the signal phase-locked loop circuit.
ADF4360-8
- 单片机控制锁相环芯片adf4360-8产生高频信号的程序。-SCM control phase-locked loop chip adf4360-8 high-frequency signals generated program.
ADF4360-2
- 单片机控制锁相环芯片adf4360-2产生信号源的程序。-SCM control phase-locked loop chip adf4360-2 produces the signal source program.
MC145152
- 1、数字锁相环的单片机代码。 2、单片机与数字锁相环MC145152的应用系统的设计与实现。-1, the single-chip digital phase-locked loop code. 2, microcontroller and digital PLL MC145152 Application System Design and Implementation.
MC145157
- 利用C8051F340单片机控制锁相环芯片MC145157-2产生一定频率的信号-A C8051F340 single chip controls the phase-locked loop chip MC145157-2 to generate a certain frequency of the signal
ADF4360-8
- 单片机控制锁相环芯片adf4360-8产生高频信号的程序。-SCM control phase-locked loop chip adf4360-8 high-frequency signals generated program.
lm3s1138_adc
- 基于《Stellaris外设驱动库》的例程：处理器直接触发ADC采样 本实验演示配置ADC采样序列0，通过处理器直接触发ADC采样，ADC模拟量需从外部输入（ADC0），最大不能超过3.0V，因为ADC内置的参考电压为3.0V。 在进行ADC配置之前，必须首先进行PLL锁相环配置（详见EasyARM1138例程\02 SysCtl(系统控制)\3 锁相环PLL设置）。错误配置PLL将使系统进入异常。 ADC采样得到的数字量将利用超级终端从串口读出 。本开发板采用US
ADF4001
- 基于ADF4001的单片机控制程序，实现锁相环的功能-ADF4001-based microcontroller control program to realize the function of phase-locked loop
APL99
- An All-Digital Phase-Locked Loop (ADPLL)-Based Clock Recovery
ADF4350
- The ADF4350 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external loop filter and external reference frequency
chaoshengbo
- 能够用超声波测距 详细讲述超声波原理还有锁相环等资料-Ultrasonic distance measurement can be described in detail with the principle of ultrasonic phase-locked loop, etc
rfm12_receive51
- RFM12是一款低成本的ISM频段FSK收发模块,其核心电路采用的是带锁相环（PLL）技术的RF12射频收发芯片. RFM12可工作在315/433/868/915MHz四个频段,并符合FCC和ETSI-RFM12 ISM band is a low-cost FSK transceiver modules, the core is used with a phase-locked loop circuit (PLL) technology, RF12 RF transceiver chip.
adfmreceiver
- The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency,iωand the respective output frequency,oωvia p
xiaoei
- 锁相环 mb1504 源程序，可直接使用.以及串口通信接收程序-Phase-locked loop mb1504 source, can be used directly. As well as the serial communication receiver
xiaohei
- 锁相环 mb1504 源程序，可直接使用.以及串口通信接收程序-Phase-locked loop mb1504 source, can be used directly. As well as the serial communication receiver
eeeaasy_plla
- easy pll，非常好的的PLL(锁相环设计工具)! -easy pll very good PLL (phase-locked loop design tools)
ssb-pllmb1504
- 利用892051和MB1504锁相环程序-892 051 and MB1504 phase-locked loop program
2012.4.26-SD5duoji-pinlvceshi
- 2012.4.26-SD5舵机频率测试，飞思卡尔 智能车比赛 舵机测试频率 源程序，包含了对飞思卡尔s12xs128单片机相应模块的初始化设置，如锁相环PLL，pwm，PIT,以及PID参数的整定。-2012.4.26-SD5 Servo Frequency Test, Freescale Smart Car Competition steering gear test frequency source that contains initialization settings on the F
PLL
- 30MHz-200MHz PLL锁相环，硬件电路，控制程序，原理图使用ORCAD,PCB使用POWERPCB5.0，控制程序使用KEIL C-30MHz-200MHz PLL phase-locked loop, the hardware circuit, control procedures, schematics using ORCAD, PCB use POWERPCB5.0 control program uses KEIL C
FLL-P-locked-loop-program
- msp430F169锁相环实现，完全最基本的功能！-msp430F169 phase-locked loop to realize fully the basic function!