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solution1324
- SX-CPLD/FPGA 数字逻辑电路设计实验仪 SX-CPLD/FPGA 数字逻辑电路设计实验仪 产品介绍 1.利用CPLD/FPGA 提供的软硬件开发环境学习最新逻辑IC 设计，以取代TTL/CMOS 复杂的硬件设计。 2.可使用电路绘图法、ABEL 语言、波形图和数字硬件描述语言法(VHDL/AHDL)来开发电路。 3.CPLD/ FPGA 提供引脚可任意设定,故作测试实验时不需要做硬件连接,可节省大量连线焊接时间,快速学习软硬
CY7C68013AD
- 本文件是一个我买的开发板的原理图，型号是:CY7C68013,用ALTIUM或PROTELL DXP打开。-This document is a development board I bought the schematic diagram, model is: CY7C68013, with Altium or opens PROTELL DXP.
FreqencyTreatise
- 该文档是我大学的毕业设计，一个频率计的设计实例，原创，里面还有实物的图片！其中用到单片机和FPGA相结合的方案！-The document that I graduated from the University of Design, a design example of frequency, originality, there is also kind of picture! Which used a combination of MCU and FPGA program!
315MHz_Communication
- 本人写的一种在恶劣环境下的用315MHz无线模块进行可靠的数据通信的编解码方法，经过软硬件测试，可靠性很高！-I write a bad environment in the wireless module with 315MHz for reliable data communication encoding and decoding methods, through hardware and software testing, reliability is high!
adfmreceiver
- The design of the All Digital FM Receiver circuit in this project uses Phase Locked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency,iωand the respective output frequency,oωvia p
SPI_STM32_FPGA
- STM32F1与FPGA通过SPI进行通信，我上传的是32部分的程序，已经通过串口测试成功。此程序可拓展为和单片机，DSP通过SPI进行通信-STM32F1 and FPGA communication through the SPI, I uploaded the 32 part of the procedure has been successfully tested through the serial port. This program can be extended to and s
FPGA控制AD7321的模块
- FPGA控制AD7321的模块，是本人亲自试验过的。有Verilog源码，和简单文档(Fpga control module of ad 7321, is I personally tested. Verilog source code, and simple documentation)