搜索资源列表
MCU-counter
- 用verilog实现单片机计数器 用verilog实现单片机计数器-MCU with verilog counter with MCU counter verilog
FPGA--DDS-PhaseMeasure
- Verilog实现的DDS正弦信号发生器和测频测相模块，DDS模块可产生两路频率和相位差均可预置调整的值正弦波，频率范围为20Hz-5MHz，相位范围为0°-359°，测量的数据通过引脚传输给单片机，单片机进行计算和显示。
work
- 利用verilog实现单片机的反向设计。编程环境为modelsim6.0
Verilog
- DDS，FPGA产生，用verilog语言实现
ledcount60.verilog语言书写 用数码管显示
- verilog语言书写 用数码管显示，60位的计数器，加上分频模块可以实现时钟功能,verilog language digital display, 60-bit counter, together with the sub-frequency clock function modules can be achieved
用EPM1270实现的1602液晶驱动Verilog
- 用EPM1270实现的1602液晶驱动Verilog,EPM1270 achieved by 1602 LCD driver Verilog
dual_ram
- FPGA和双端口RAM的DDS任意波形发生器的实现-FPGA and dual-port RAM of the DDS Arbitrary Waveform Generator
TFTDriverNew_V2
- TFT液晶屏驱动模块Verilog源码。实现方法：XC95288+K6R4008，K6R4008主要用作帧缓冲区，此模块仅支持256色-TFT LCD driver module Verilog source code. Realization: XC95288+ K6R4008, K6R4008 mainly used as a frame buffer, this module only supports 256 colors
spi
- 三线spi接口，用verilog实现，作为一个模块，可以接收并行数据，然后串行发送-Three Line spi interface, using Verilog implementation, as a module, can receive parallel data, and then send the serial
AD_DA
- 非常好的,能够实现ad-da转换的子程序-Very good, to realize ad-da conversion subroutine
saa7113
- 视频解压缩程序（用verilog语言实现）-Video decompression procedures [verilog]
SPI_verilog
- 基于摩托罗拉单片机MC68HC11E的SPI总线的verilog实现 -Motorola single-chip based on the SPI bus MC68HC11E Verilog implementation
timeclock
- 基于verilog的时钟定时器的硬件实现，可以实现时钟定时报时功能-Based on the verilog hardware timer clock can be achieved from time to time time clock function
DW8051(Verilog)
- 51单片机IP核源码，可以在fpga实现，并进行仿真与验证-51 single-chip IP nuclear source, you can achieve the fpga, and simulation and verification
comunication
- 无线通信中的常见通信算法处理verilog代码，对于通信硬件实现研究非常有用！-Wireless communications in the algorithm to deal with common communications verilog code for hardware implementation of communication research is very useful!
miaobiao
- 用VERILOG实现秒表的开发设计，(1)熟悉按键扫描、按键防抖和数码管驱动接口电路原理；(2)掌握按键扫描、按键防抖和数码管驱动接口电路设计开发；(3)掌握状态机实际应用设计。-To achieve the development of a stopwatch with VERILOG Design, (1) be familiar with key scanning, image stabilization and digital control key driver interface c
W5300_Driver_V1[1].1.1
- 硬件TCPIP协议栈芯片W5300的使用例子代码,该芯片内部通过硬件实现了TCPIP协议栈,可减少CPU运行协议栈的开销.-Hardware TCPIP protocol stack chips W5300 examples of the use of code, the chip hardware implementation of the internal adoption of the TCPIP protocol stack can reduce the CPU overhead of
i2c_core
- IC2_master的Verilog实现，跟大家共享一下-IC2_master verilog
digitial_clk
- 使用Verilog写时分秒数字时钟,实现基本的时钟计时功能。(Use Verilog to write time-division-second digital clocks for basic clocking.)
video_20160727_mmz94lzfhx5qd
- 用verilog实现视力测试功能，可用蓝牙和按钮(Visual acuity test by Verilog)