基于EasyFPGA030的开平方运算实现工程。-The square root operation on EasyFPGA030 achieve project.

VERILOG描述的开平方模块核，开方运算是FPGA或ASIC设计中所需要的核心运算模块。-VERILOG descr iption of open square modules nuclear root operation is the core computing module FPGA or ASIC design.