搜索资源列表
dianziqin
- 简易电子琴设计毕业论文 vhdl (1)设计一个简易的八音符电子琴,它可通过按键输入来控制音响。 (2)演奏时可以选择是手动演奏(由键盘输入)还是自动演奏已存入的乐曲。 (3)能够自动演奏多首乐曲,且每首乐曲可重复演奏。
CIC
- CIC IP core实现结构中自动生成的接口代码,基于软件无线电的应用,在毕业论文中已使用过。-CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
nerualnetwork
- 本文为通信专业硕士研究生的毕业论文。主要研究神经网络的FPGA实现及其在网络拥塞控制中的应用。 -In this paper, for the communications professional Master s thesis. Major study of the FPGA realization of neural networks and its application in network congestion control applications.
15883852DJDPLV_LWB
- 数字频率计毕业论文 不是自己做的-Digital Cymometer thesis do not own. . Ha ha
lunwenVHDL
- 毕业设计vhdl论文的先期工作。对于大学毕业设计论文有重要作用-Graduate design vhdl advance work papers. For the university graduation thesis plays an important role
Baseband_line_code
- 基于VHDL语言的基带线路码产生电路设计(毕业论文),内涵完整的源代码-Based on VHDL language baseband line code generation circuit design (Thesis), meaning the complete source code
kuaisufuliyebianhuan_fft_lunwen
- 快速傅里叶变换FFT论文及有关的源程序代码,值得一下,不下实在是浪费了,我找了很久才找到的,有些是一些大牛的毕业论文全文-FFT,VERILOG,some article about FFT and some codes of FFT
line_ccd
- 高速线阵CCD图像数据采集系统的研究,是一篇毕业论文,详细介绍了线阵CCD图像采集系统。-High Speed Linear CCD Image Data Acquisition System, is a thesis, detailing the linear array CCD image acquisition system.
VHDL-electronic-clock-design
- 毕业论文--基于硬件描述语言VHDL的电子钟设计-Thesis- VHDL hardware descr iption language based on the electronic clock design
fsg
- FSK调制与解调VHDL程序及仿真,完全实现!毕业论文实用!-FSK modulation and demodulation process and VHDL simulation, the full realization of Thesis and practical
The-VHDL-music-playing
- VHDL音乐演奏与编码-毕业论文,网上下载的,收藏了,贡献给有需要的人-The VHDL music playing and encoding- Thesis, online download, and contribution to the people in need
FPGA_UART
- 毕业论文2010届06电子(的“基于FPGA的UART模块设计”-what is this
radar-controller-design-
- 某个雷达控制器的实现,当中的一些思想还是值得借鉴的,这是哈工大的硕士毕业论文,参考价值很大!-The realization of a radar controller, among some of the ideas or worth learning, This is HIT master' s thesis, a great reference value!
text_fir_lbq
- 本人毕业论文中的一个模块,我FIR有限长滤波器,可以直接编译仿真下载。。实际测试可用-A module in my thesis, I finite length FIR filters can be directly compiled simulation download. . The actual test are available. .
FPGA--FIR--bishe
- 一篇参考的毕业设计论文,做的是参数可调的数字滤波器。有详细的原理介绍,设计源程序及仿真流程与结果-A reference of the graduation design paper, adjustable parameters of digital filter. Have detailed introduces, the principle of the design source program and the simulation process and result