以Altera公司的MAX+plus II为工具软件，采用Verilog HDL文本输入设计法设计8位二进制加减计数器，生成元件符号-Altera s MAX+plus II tools software, using Verilog HDL text input method to design8 binary addition and subtraction counter, generating element symbol

有符号数除法，用移位法实现，需要Basys2硬件支持，更新了除数为-8的漏洞。-Signed division, achieved by shifting method requires Basys2 hardware support, updated the divisor is-8 vulnerabilities.