搜索资源列表
fenpin(vhdl)
- 使用VHDL编写的分频程序,能进行任意次的偶数分频,程序简单易懂,供 初学者参考-prepared by the use of VHDL-frequency procedures can make even the random frequency, the procedures are simple and easy to understand. reference for beginners
decoder(vhdl)
- 这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand
key_prog
- 简单易懂的4*4键盘扫描及显示程序。对编写其他形式的键盘扫描程序有一定的指导意义.-easy-to-read 4 * 4 keyboard and display program. To the preparation of other forms of keyboard scan procedures are certain guiding significance.
clk_2div
- vhdl语言编写的2分频器代码，简单易懂
VHDL语言实现3—8译码器
- 应用VHDL语言编写的3—8译码器，简单易懂
Walsh
- 利用ISE编写的产生WALSH码的verilog程序，简单易懂，稍稍修改就可以产生出自己想的8 16 32 64位的WALSH码-Prepared using ISE verilog code generated WALSH procedures, easy to understand, a little modification can generate their own like the 8,16，32，64-bit code WALSH. .
uart
- verilog编写的uart发送和接收的源代码。简单易懂。-verilog uart prepared to send and receive the source code. Straightforward.
sin
- 用VHDL编写的实现EDA实验中显示sin波形代码。简单易懂，应该对大家都有帮助-VHDL prepared with the realization of the experiment showed that EDA code sin waveform. Easy-to-read, should help to everyone
matrixkeyscan
- 4*4矩阵键盘的VHDL控制语句，我自己编写的，简单易懂，需要的朋友可以参考-4* 4 matrix keyboard VHDL control statements, I have written, easy to understand, you can reference to see if someone need
jiaotongdeng
- 简单的交通的源代码，用vhdl程序编写。简单易懂。适合初学者参考。-Simple traffic source code, vhdl programming. Straightforward. Reference for beginners.
diwu
- 应用VHDL语言编写设计一个正负脉宽可控的4分频的分频器。程序简单易懂；-Application of VHDL language to design a controlled positive and negative pulse frequency divider 4. Procedures are simple and easy to understand
di
- 应用VHDL语言编写设计一个正负脉宽可控的4分频的分频器。程序简单易懂；-Application of VHDL language to design a controlled positive and negative pulse frequency divider 4. Procedures are simple and easy to understand
test_42(NEW)
- verilog矩阵键盘扫描程序,编写简单易懂，4X4矩阵键盘读取，比通常的编写更加简单-verilog matrix keyboard scanner, writing easy to understand, 4X4 matrix keyboard to read, write more than the usual simple
startstopwatch
- 利用VHDL编写的电子计时计分表，该程序简单，易懂-Written using VHDL electronic timing scoring table, the program is simple, easy to understand
mapper
- 个人编写的wimax协议的映射部分程序，可以实现ask、bpsk、16qam和64qam四种调制功能，使用查表的方式实验，程序简单易懂！-Wimax protocol mapping part of the program was written by individuals, you can ask, BPSK, 16qam and 64qam four kinds of modulation functions, the use of look-up table way of experim
liushui
- 用verilog编写的简易流水灯，里面包含分频器、选择器等，简单易懂。-failed to translate
24xiaoshijishuqi
- 用verilog编写的24小时计数器，可以用作电子时钟，简单易懂。-Written in verilog 24 hour counter, which can be used as electronic clock, easy to understand.
music_verilog
- 本例程使用verilog语言编写的一段用蜂鸣器播放的新闻联播背景音乐，简单易懂，适合初学者。-The routine use of a verilog language news network with a buzzer to play background music, easy to understand for beginners.
music_qhc
- 本例程使用verilog语言编写的一段用蜂鸣器播放的周杰伦的青花瓷，简单易懂，适合初学者。-The routine use of verilog language section with a buzzer play Jay' s blue and white porcelain, easy to understand for beginners.
uart
- VHDL编写的UART异步串行通信接口程序，，，经过仿真验证，简单易懂-VHDL prepared UART asynchronous serial communication interface program, through simulation, simple,,,,,