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cpu_vh
- 一个大学计算机组成原理CPU的课程设计，比一般的CPU的课程设计多了几种寻址方式，总共六种寻址方式，对CPU的内部问题能有很深的了解。-Principles of Computer CPU of a university curriculum design, the CPU than the average of several courses designed to address multi-mode, a total of six addressing modes, the CPU'
multi_cycle_cpu
- 多周期cpu,multi_cycle_cpu，南京大学计算机系计算机组成原理实验-Of multi-cycle cpu, multi_cycle_cpu, Nanjing University Department of Computer Science Computer principle experiment
alu_arm_alu_mips
- 加法器的arm实现和mips实现，alu_arm,alu_mips,南大计算机系计算机组成原理实验-Adder arm to achieve and realize mips, of alu_arm alu_mips, Nanda, Department of Computer Science Computer principle experiment
computer
- Maxpluss2开发环境，用VHDL语言做的计算机组成原理课程设计-Maxpluss2 development environment, using the VHDL language curriculum design principles of computer components
QinYuchu
- 用vhdl做的计算机组成原理课程设计的资料，实现加法运算，进行求和，仿真实例等资料！-Vhdl to do with the computer information on the composition of curriculum design principles to achieve the addition operation, a sum, simulation examples, etc.!
CPUdesign
- 计算机组成原理实验多时钟周期CPU设计，包含VHDL代码的设计，实验电路图，实验详细截图。-Computer component experiments designed more CPU clock cycles, including VHDL code design, test circuit, test detailed screenshots.
keshe
- 计算机组成原理课设，做了一个cpu，希望对同学对计算机组成原理的学习有帮助-Computer organization course designed to do a cpu, the students hope to learn on the computer organization help
booth4
- 4位的booth算法加法器，对计算机组成原理的学习有帮助，verilog语言编写-4-bit adder booth algorithm, the learning of computer organization help, verilog language
jiafaqi
- 计算机组成原理实验中加法器的verylog编程-computer
DE2shijian(7)
- FPGA与SOPC设计教程：DE2实践-第七章 计算机组成原理练习-FPGA and SOPC design tutorials: DE2 Practice- Practice Computer Organization Chapter VII
isa
- 计算机组成原理实验报告及课程安排，里面有具体指令的设计思路。-Computer Organization and curriculum lab reports, there are specific instructions design ideas.
mips0
- 计算机组成原理的课程设计，是自己根据已有的例子进行修改得来的-Computer Organization course design is based on the existing examples of their own come to modify
1
- 计算机组成原理大实验 北邮 硬连线控制器-computer
CPU
- 这是用Quartus II 6.0做的CPU实验，是计算机组成原理专题实验。-This is done using Quartus II 6.0 CPU experiment, experimental feature is the computer organization.
bcdfa
- 计算机组成原理，4位加法器实验VHDL代码。已运行成功。-Computer organization, 4-bit adder VHDL code experiments. Has been running successfully.
add8
- 8位加法器，计算机组成原理课程设计，利用Quartus -Eight adder
RISC_CPU
- 一个简单CPU设计，可以让读者在计算机组成原理和verilog语言方面受益-A simple CPU design, allows the reader to the computer principles and Verilog language benefit
ARM_register
- ARM寄存器的设计，南京大学计算机系计算机组成原理实验内容-ARM register designs, Nanjing University Department of Computer Science, Principles of Computer Organization experiment content
实验九 计算机核心（CPU+RAM）的设计与实现
- 计算机组成原理的CPU实验，基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)
2017级计算机组成原理课程设计任务1--CPU设计实验
- 学习计算机组成原理的必备利器 用实际操作来亲身感受计算机的内部工作原理(A necessary tool for learning the principle of computer composition Experience the inner workings of a computer with actual operation)