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CAN_IP.rar
- 这是CAN总线控制器的IP核，源码是由Verilog HDL编写的。其硬件结构与SJA1000类似，满足CAN2.0B协议。,This is a IP core of the CAN bus controller written by the Verilog HDL. whose structure is similar with SJA1000,supporting the protocol of CAN2.0B.
canbus
- CAN通信协议的硬件描述语言代码，用于FPGA的总线接口控制器开发-CAN communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
design-of-CAN-based-on-VHDL
- 基于Verilog+HDL设计CAN控制器,详细介绍各功能模块的设计。本论文的重点是CAN总线通信控制器的前端设计。即用Verilog HDL语言完成CAN协议的数据链路层的RTL级设计，实现其功能，并且能够在FPGA开发平台Quartos上通过仿真验证，证明其正确性-Verilog+ HDL-based design of CAN controller, detailed design of each functional module. This paper focuses on the C
canbus
- 此例参照SJA1000CAN通信控制器，通过CAN总线控制器完成CAN总线的通信协议。所传文件为CAN总线的VERILOG代码。-This reference SJA1000CAN communication controller, to complete the communication protocol of CAN bus through the CAN bus controller. The transfer document for the CAN bus VERILOG code.
can
- CAN总线控制器的FPGA源代码，verilog语言编写，支持CAN2.0B协议。对CAN总线开发者非常有用。-FPGA CAN bus controller source code, verilog language, support CAN2.0 protocol B. Developers of CAN bus is very useful.
CAN_verilog.tar
- CAN 2.0协议控制器，非常全面的控制器Verilog代码，可靠通信，可放心使用。(CAN Bus 2.0 Controller.)
CAN总线，I2C，USB等的FPGA实现源码
- 控制器局域网总线协议的Verilog代码(The Verilog code of the CAN bus protocol)