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FIFO-DC
- FIFO的Verilog程序 已在modelsim中编译通过 并且可以通过DC进行综合
lowpower-multiplier
- 32位无符号低功耗的乘法器,经过10000次测试,用smic.13工艺,DC综合后,延时为8ns,功耗仅为635uw.-it is an unsigned 32bit multiplier.100000 benchmarks have been tested and all of them passed. With smic 0.13um process library, after disign complier analysis, the clock period is 8ns,and th
DC
- 可综合代码的风格，总结的比较有用处，作为IC设计的必须掌握的技术；-Code can be integrated style, to summarize the more useful, as IC design must master the technology
DC
- DC综合的重要资料，帮助深刻理解DC综合的全方面-DC Comprehensive important information to help a deep understanding of the DC Comprehensive
DC
- DC综合的重要资料，帮助深刻理解DC综合，在建立时间和保持时间的设置上很有帮助-DC Comprehensive important information to help a deep understanding of the DC Comprehensive
FPGA
- fpga综合工具比较，三种综合工具，包括synplify，dc等-fpga synthesis tool compared with three integrated tools, including synplify, dc
dianji
- 直流电机综合测控系统的设计、直流电机驱动控制电路顶层设计-The design of the integrated monitoring and control system of the DC motor, DC motor drive control circuit top-level design
mb
- xilinx公司Microblaze核源文件，版本v7_10_a，语言VHDL，用于FPGA开发和DC综合-xilinx company Microblaze nuclear source file, version v7_10_a, language VHDL, and FPGA development for integrated DC