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sobel
- 这是本人自己编写的可用于256*256大小的图像进行sobel边缘检测的vhd文件，可在QuartusII或MaxplisII下综合和仿真，并在FPGA上测试过。可以进行修改支持其他大小图像的sobel边缘检测，同时还可以实现其它的图像模块化处理算法，例如高斯滤波，平滑等。-this is my own preparation for the 256 * 256 size of the image segmentation Edge Detection vhd document in the n
verilog2
- 用verilog语言编写的按键消抖程序。通过下降沿检测法可以判断出是否按键。压缩包内也包含此按键消抖程序的modelsim仿真文件。-Verilog language with key debounce process. By falling edge detection method can determine whether the key. This compressed package also contains procedures for key debounce modelsim
edge
- 图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换-Image processing edge detection of VHDL source code, the algorithms used are garbor transform
edge_check2
- 一种实用的上升沿检测程序，可用于上升沿检测，或根据上升沿生成高低电平等-Rising edge of a practical testing procedure can be used for rising edge detection, or generated in accordance with the high-low, such as rising edge
edge_detection
- edge detection algorithm in verilog HDL, along with test bench file. compiled in modelsim6.1
TIMEFACEDETECTIONANDLIPFEATUREEXTRACTIONUSINGFPGA
- Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bay
sobel
- verilog sobel FPGA edge detection-Adopted verilog language realizes sobel edge detection in image processing algorithm
Code_for_MedianFilter33
- 包含边缘探测的中值滤波FPGA工程，分辨率1024x16-Contains the edge detection filter in the value of the FPGA project
orcad_tutor
- A CODE FOR EDGE DETECTION IN FPGA
sobel
- 多级流水线8位sobel图像处理边缘检测程序-sobel edge detection
New-Microsoft-Office-Word-Document
- VHDL EDGE DETECTION SYNOPSIS
motor_PWM
- 刚写的verilog 程序，控制直流电机正反转，具有严格的按键消抖函数，采用脉冲边沿检测法，防止误触发！-Just write verilog program to control the DC motor reversing, with strict key debounce function, pulse edge detection method, to prevent false triggering! ! ! Beginner EDA, if insufficient, please
Detection-Algorithm
- vhdl for edge détection prewi-vhdl for edge détection prewitt
edge_tech_design
- verilog的边沿检测技术，在fpga信号处理中应用相当的大,这也是一门艺术-the the verilog edge detection technology, in fpga signal processing is quite large, and this is an art
key_scan
- 这个是学习FPGA时候自己写的键盘扫描的代码。采用的是边沿检测的方法,并且进行了滤波处理，本人测试仿真成功！-This is when the FPGA write their own learning keyboard scan code. Use is edge detection method, and its filtering processing, I test simulation success!
Code_for_MedianFilter33
- 数值图像处理：中值滤波设计，3*3方形窗，边缘检测的设计代码-Numerical image processing: the median filter design, the design code of 3* 3 square window, edge detection
vhdl-program
- sobel edge detection using vhdl
Grayscale-Conversion-IP
- Sobel Edge Detection IP for FPGA using LABVIEW
edge-detection1
- 基于FPGA开发环境，根据Sobel model算法，关于边缘检测的verilog代码。-the code of edge detection based on verilog.
Extras_Edge_Detection
- Altera Edge Detection for FPGA