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simple_fm_receiver.tar
- FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
dds_ise7.1_su
- 用Verilog语言实现信号发生器，包括AM，FM,PM，ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
AM-FM-software-radio
- 用FPGA开发AM，FM接收机的论文，外国人写的，我已实现-FPGA development using AM, FM receiver paper, written by foreigners, I realized
DDS
- FPGA实现直接数字频率合成（DDS），使用EP1C3T144C8通过调试-Cyclone,aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
dds_9760_OK
- ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequen
dds_final
- 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjusta
fsk
- 实现数字调频，已编译好。通过时钟分频产生不同的频率。-Digital FM, has been compiled. Clock frequency generated by different frequency.
DDSSYNCtrl_tri_face
- AD9910的实验代码，使用并口实现快速调频，编程通过原理图和语言混合-AD9910 experimental code, the use of parallel fast FM, the programming language through the schematic and mixed
ep1c12_29_dds
- 基于周立功SOPC实验开发平台，利用VHDL语言，实现DDS调频-Zhou, who based SOPC experimental development platform, using VHDL language, to achieve DDS FM
DDS
- 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
simple_fm_receiver_latest.tar
- 用FPGA实现简单的FM接收机，d/a模块用扬声器-FPGA implementation using a simple FM receiver, d/a module with speaker
if-receiver
- 中频数字接收机设计与实现 对中频数字接收机方案的可行性作了分析，并通过系统仿真工具SystemView对A／D，数字下变频(DDC)及AM、FM等调制信号的软件解调作了仿真。-Design and implementation of a digital intermediate frequency receiver
fm
- 利用altera的cyclone FPGA芯片，实现FM调制，并使用自带的逻辑分析仪仿真成功-The use altera cyclone FPGA chip, FM modulation, and use its own logic analyzer successful simulation
fm(912)
- 利用altera的FPGA，采用DDS原理实现FM调试，调试系数可改变，并通过DA变换输出，仿真以及下板测试成功-The use altera FPGA, using the DDS principle to achieve FM debugging, debugging coefficient can be changed through DA conversion output, simulation, and the lower plate test is successful
FM
- 基于FPGA和弦！！！音乐芯片的设计与实现-Design and implementation of FPGA chip based on the chord music
DDS
- DDS的FPGA实现(VHDL),只可调频，调幅可于外部DA实现。(内附三角波、正弦波、方波的rom调用)-DDS on FPGA (VHDL), only FM, AM can be implemented in an external DA. (With triangular wave, sine wave, square wave rom call)
DDS
- Verilog实现DDS线性调频，Verilog实现DDS线性调频-Verilog implementation of DDS linear FM，Verilog implementation of DDS linear FM
Lab4
- 该实验室会议的目的是要实现一个可配置的FM-AM数字调制器的数据通路。它是由一个CIC内插滤波器及可配置的FM-AM块。调制器信号以48kHz被取样，并且由CIC内插滤波器的装置内插高达96MHz的。在FM-AM配置块适用于96 MHz的时钟-The aim of this laboratory session is to implement the data-path of a configurable FM-AM digital modulator. It is composed of
fm
- 用matlab实现了数字正交解调，叙述了数字正交解调算法的过程与原理-Matlab digital quadrature demodulation, describes the process and principle of digital orthogonal demodulation algorithm
fm
- FM调频的FPGA程序，用ALTERA的FPGA实现-FM altera fpga veriloghdl