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这是硬件逻辑设计的一份参考资料，总结了目前主流FPGA供应商设计的注意事项。-This is a hardware logic design of a reference, summed up the current mainstream FPGA vendor design for attention.
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一个以太网卡的硬件描述，可以参考进行设计网卡芯片。-an Ethernet card hardware descr iption, reference card chip design.
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包含UART口的VERILOG源程序，该程序在FPGA上验证通过，可作为芯片设计，或FPGA设计的一个完整IP核，硬件设计的兄弟们可参考一下。-include UART port of VERILOG source, the program tested in FPGA, as chip design, or FPGA design of a complete IP cores, hardware design brothers can make reference.
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这是一个Verilog HDL编写的RISC cpu的程序，该程序共10个子程序，实现了简单的RISC cpu，可供初学者参考，学习硬件描述语言，及设计方法。该程序通过了modelsim仿真验证。-This is the RISC cpu code which writed by Verilog HDL.This code has ten subprogram which
came true the simple RISC cpu. Beginner can reference this e
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Verilog 黄金参考指南是Verilog 硬件描述语言及其语法语义合并以及将它应用到硬件设计的一个
简明的快速参考指南-Verilog Golden Reference Guide is the Verilog hardware descr iption language and its syntax and semantics combined it applied to hardware design, a concise Quick Reference Guide
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使用Verilog硬件描述语言完成了一个异步FIFO的设计，供相关硬件开发人员参考。-Verilog hardware descr iption language used to complete an asynchronous FIFO design, hardware development for the relevant reference.
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本书的主要的服务对象是熟悉硬件系统，而对软件的设计经验缺乏的工程师；叙述了VHDL的用法-This guide is intended for the engineer who is familiar with the principles of
hardware design, but has little experience in designing with a language-based
synthesis system. It describes the general c
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这是一个基于FPGA/SOPC设计的简单串口程序，是FPGA硬件和niosII软件编程的结合。对初学者有很大的借鉴意义。在Quartus6.1和niosII6.1环境下编译通过，并且下载到板子上运行成功-This is based on FPGA/SOPC design a simple serial program is FPGA hardware and software combination niosII. Great for beginners reference. In Quartu
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Altera provides a number of reference designs that show efficient solutions for common design problems. Altera® reference designs can be used to develop new solutions and innovative products, improve your understanding of Altera product capabilit
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Verilog 黄金参考指南是Verilog 硬件描述语言及其语法语义合并以及将它应用到硬件设计的一个简明的快速参考指南。-Verilog Golden Reference Guide is the Verilog hardware descr iption language and its syntax and semantics of its merger application to the hardware design of a simple quick reference guide
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赛灵思FPGA开发板上时钟源的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board clock source of the VHDL source code, hardware design can be used as reference!
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赛灵思FPGA开发板上调试模块的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board debug module' s VHDL source code, hardware design can be used as reference!
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赛灵思FPGA开发板上BRAM模块VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
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xilinx公司提供的关于FPGA硬件设计的额时序约束参考资料-xilinx provided on the FPGA hardware design timing constraints of the amount of reference material
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xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。-The use of Xilinx FPGA and Memory Interface Gen
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VHDL黄金参考手册，包括VHDL语言的语法特点，综合以及常用硬件设计实例。-VHDL golden reference guide The VHDL Golden Reference Guide is a compact quick reference
guide to the VHDL language, its syntax, semantics, synthesis and
application to hardware design.
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该例子是基于sopc的IIC总线设计完整设计，分为硬件和软件部分，软件部分是用c语言编写的。该项目是个以完成的项目，据有较高的参考和经济价值。该例子是原来做过的项目。
整个项目是在Quartus II 7.0和nios IDE环境下开发。-This example is based on the IIC bus design sopc complete design, divided into hardware and software, the software part is writt
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The Altera® Triple Speed Ethernet (TSE) data path reference design
provides a sample SOPC Builder system using the Altera TSE MegaCore®
function with two serial transceivers. This reference design demonstrates
the operation of the Alte
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VHDL课件，希望给想学习硬件描述语言的新手一个好用的参考资料-VHDL courseware, want to want to learn hardware descr iption language, a useful reference for beginners
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采用vhdl语言 设计FIR滤波器，经调试好使，献给广大硬件开发的朋友参考学习-FIR filter design using vhdl language, so that upon commissioning, the development of friends dedicated to the general hardware reference learning
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