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VHDL_infrared_telecontrol_design
- Infrared telecontrol design based on the the VHDL includes the mode of infrared send,receive mode,key code mode,ringing mode and so on.
wave
- 可控脉冲发生器的VHDL源代码。设计文件加载到目标器件后，按下按键开关模块的S8按键，在输出观测模块通过示波器可能观测到一个频率约为1KHZ、占空比为50 的矩形波。按下S1键或者S2键，这个矩形波的频率会发生相应的增加或者减少。按下S3键或者S4键，这个矩形波的占空比会相应的增加或减少。-Controllable pulse generator of the VHDL source code. Design documents loaded to the target device and p
DES101
- 数据加密算法（Data Encryption Algorithm，DEA）的数据加密标准（Data Encryption Standard，DES）是规范的描述，它出自 IBM 的研究工作，并在 1997 年被美国政府正式采纳。它很可能是使用最广泛的秘钥系统，特别是在保护金融数据的安全中，最初开发的 DES 是嵌入硬 件中的。通常，自动取款机（Automated Teller Machine，ATM）都使用 DES。文件是DES代码的VHDL描述 -Data encryption algor
led_key
- FPGA EP2C5Q288C8 KEY操作 原码,测试OK 打开即用.-FPGA EP2C5Q288C8 KEY operate the original code, test that is used to open OK.
digital_lock
- Verilog code for digital combinational lock //BCAC – Unlock sequence //wrong sequence –alaram goes on and goes off only after pressin another 4 wrong buttons. //once the lock is open ,we can close the lock by pressin any key //From any state
key
- cyclone系列下，采用计数器现实案件消抖的verilog HDL语言源码-series under the cyclone, the consumer cases Buffeting counter the reality of the verilog HDL language source code! !
key
- 基于FPGA的键盘程序代码，可用单片机控制-FPGA-based keyboard program code can be used SCM control
stopwatch
- 数字秒表的VHDL代码。当设计文件加载到目标器件后，设计的数字秒表从00-00-00开始计秒。，直到按下停止按键（按键开关S2）。数码管停止计秒。按下开始按键（按键开关S1），数码管继续进行计秒。按下复位按键（核心板上复位键）秒表从00-00-00重新开始计秒。-The VHDL code for digital stopwatch. When the design document loaded into the target device, the designed digital stop
key
- 用vhdl语言实现des编码中的密钥产生 是des编码中重要的一部分-Des code using vhdl language in the key generation is an important part des coding
key
- 扫描键盘阵列由复数行以及复数列所交错而成，每一这些行以及每一这些列的交错处是对应至一键盘钮，当某个键被按下时,阵列会产生一选择信号并输送给7段数码管解码器显示-enter the key and display in 7 sections of numerical code tubes
keypadinterfacecontroller
- 设计并实现一个4X8键盘接口控制器，含有时序产生电路、键盘扫描电路、弹跳消除电路、键盘译码电路、按键码存储电路、显示电路。要求：当按下某一键时，在数码管上显示该键对应的键值-Design and implement a 4X8 keypad interface controller, with timing generator circuit, the keyboard scanning circuit, bounce elimination circuit, the keyboard deco
code
- it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm
key
- 该代码使用VERILOG编写，用于实现4 x 4的键盘扫描。-The code is written using the VERILOG, used to implement the 4 x 4 keyboard scan.
lock-and-lcd
- 基于博创实验箱UP-CUP-FPGA2C35-Ⅱ和Verilog HDL硬件描述语言，分为按键输入模块、LED指示灯模块及LCD显示模块，采用按键BTN1、BTN2作为输入端输入四位密码与事先设定的密码进行匹配，由D1、D2、D3、D4四盏LED灯来指示输入密码的位数。开机时，LCD显示“HELLO! WELCOME!Enter the code:当”，密码输入正确时，LED灯D7亮，同时在实验箱LCD显示屏上显示字符串“Good! Well done!you are right!!!”，当密码
key-board-and-mouse-VerilogHDL
- 键盘鼠标的原代码,用FPGA实现,使用VerilogHDL编写-Keyboard and mouse of the original code, FPGA, using VerilogHDL writing
ps2verilog
- 本程序实现了基于FPGA的PS2键盘控制器，主机即FPGA读取键盘的键码然后解码输出到上位机（串口调试助手）显示，用户友好，调试方便，-This program implements the PS2 keyboard controller based on FPGA, the FPGA reads the keyboard master key code and then decode the output to the host computer (serial debugging assis
Key
- verilog键盘扫描码完整程序，已在quartus ii软件上验证。-verilog keyboard scan code complete program has been in quartus ii software verification.
key
- 在可编程器件上实现的按键显示的ｖｈｄｌ语言的代码-In programmable devices realize in programmable devices on the realization of the buttons on the display of code language VHDL
The-key-control-divider
- 这是一个利用VHDL代码编写通过按键控制的分频器，通过给按键s3、s2、s1、s0赋不同的值，可以使分频器输出不同频率，此代码原用于自制示波器的分频。-This is a use of the VHDL code written by key control divider divider output through to key s3, s2, s1, s0 endowed different values, different frequencies, this code is the o
新建文本文档
- Verilog编写的按键代码，采用异步串口传输协议，并带有偶校验。(Verilog's key code, asynchronous serial port transmission protocol, and with even check.)