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wavefetch
- ModelSim的波形比较的功能可以将当前仿真与一个参考数据（WLF文件）进行比较，比较的结果可以在波形窗口或者列表窗口中查看，也可以将比较的结果生成一个文本文件-ModelSim waveform can be compared to the current functional simulation with a reference (WLF paper ), the results can be compared in the waveform window or window List
manchester_verilog
- 采用Verilog HDL语言编写的曼彻斯特码， 文件列表： help md.v md_tf.v me.v me_tf.v med.v-Using Verilog HDL language of the Manchester code, the file list: helpmd.vmd_tf.vme.vme_tf.vmed.v
fpga_sec
- 学习使用波形比较功能的基本方法,ModelSim的波形比较的功能可以将当前仿真与一个参考数据（WLF文件）进行比较，比较的结果可以在波形窗口或者列表窗口中查看，也可以将比较的结果生成一个文本文件-Learning to use the wave function of the basic method of comparison, ModelSim wave function can be compared with a reference current simulation (WLF fil
ARM
- ARM内核及性能比较(列表对比)包含arm7、arm9、arm9e、arm10e、arm11等-ARM core and performance comparison (list comparison) contains arm7, arm9, arm9e, arm10e, arm11, etc.
FPGA-logic-design-considerations
- FPGA逻辑设计注意事项， 这是一个在逻辑设计中注意事项列表，由此引起的错误常使得设计不可靠或速度较慢，为了提高设计性能和提高速度的可靠性，必须确定设计通过所有的这些检查。-FPGA logic design considerations, this is a note in the list of logical design, which often makes the design errors caused by unreliable or slow, in order to impro
DE2_70_pin_assignments
- DE2-70开发板中附带的引脚的分配列表，格式为.csv的-DE2-70 development board comes with the pin assignment list, in the format. Csv
ps2_keyboard
- VErilog编写的PS2键盘读写源码 模块端口的列表： clk, reset, ps2_clk, ps2_data, rx_extended, rx_released, rx_shift_key_on, rx_scan_code, rx_ascii, rx_data_ready, // rx_read_o rx_read, // rx_read_ack_i tx_data, tx_write, tx_wr
TLB
- 用verilog语言实现了快速线性列表的查找，程序实现了一个基本框架，下载下来可以添加新内容-Using verilog language to achieve a fast linear list to find the program implements a basic framework, you can add new content downloaded
Example-b8-4
- ModelSim的波形比较的功能可以将当前仿真与一个参考数据（WLF文件）进行比较，比较的结果可以在波形窗口或者列表窗口中查看-Comparison of the ModelSim wave functions , compare the results can be viewed on the waveform window or the list window