搜索资源列表
vcpwmcpldcar
- vc++与vhdl代码,cpld接受pc串口指令,输出pwm信号控制伺服电机.双通道,各128级.使用了扩展ascii码
Source
- PWM的Verilog HDL代码用于FPGA
PWM
- PWM信号产生代码
PWM
- 脉冲宽度调制，VHDL代码编写，包括QUARTUSII和MODELSIM工程以及testbench
PWM_moto_ctrl
- verilog 代码实现 直流电机PWM控制 内有整个完整工程 和modelsim仿真文件-verilog code for PWM DC motor control to achieve within the whole integrity of engineering and modelsim simulation files
create_new_component
- sopc 中，新建component。详细介绍了如何根据HDL代码生成黑盒的过程。-SOPC, the new component. Described in detail how the HDL code generation black-box process.
pwm
- PWM脉冲产生代码，程序采用VHDL硬件描述语言！很有参考价值-PWM pulse generation code, the program using VHDL hardware descr iption language! Useful reference
pwm_timer
- PWM和Timer的FPGA实现，文档代码齐全。-PWM and Timer for FPGA implementation, documentation, code complete.
3128(vhdl)
- 里面均为用VHDL写的一些经典小程序，经过了验证均能很好的运行，一下为这些小程序的清单，希望能给大家能带来帮助： t1流水灯 t2 蜂鸣器实验 t3 拨码开关实验 t4 PWM控制LED亮度程序 t5 状态机实现流水灯 t6 静态数码管显示 t7 按键0-99计数程序 t8 红外实验 t9 0—99计数实验 t10 矩阵键盘显示 t11点阵 t12 PS2键盘识别 t13 ADC0804模拟量转化数字量实验 t14电子钟 t15 串口
pwm
- vhdl的pwm代码可以控制LED的亮度255级调节 -The pwm vhdl code
PWM
- 数控脉宽正负调制信号发生器vhdl程序代码-Positive and negative pulse width modulated digital signal generator vhdl code
PWM-control-LED--
- PWM控制LED灯亮度程序 提供的代码仅供参考 在使用时需要自己一定的修改添加-PWM control of LED brightness provides the code for reference in the use of certain modifications need to add their own
PWM
- PWMc语言代码，产生PWM波形，用于各种产品以及测试-PWMc language code to generate PWM waveforms for a variety of products and test
PWM
- fpga下自定义PWM外设的代码，可直接自定义组件的方式加入到sopc的组件库-fpga PWM peripherals under the custom code, custom components can be directly added to the way the component library sopc
PWM
- MC9S12XS128 PWM介绍，实例程序，使用说明，舵机控制程序，代码-MC9S12XS128 PWM introduction, examples of procedures, instructions, steering gear control program, code
PWM
- 基于FPGA的PWM的一小段代码！用VERILOG 写的，主要是控制一盏led灯的亮度问题-Based on FPGA PWM of small pieces of code! VERILOG with written, main is to control a lamp that led lamp brightness problem
PWM
- PWM IP 核的verilog HDL代码-CODE of the PWM IP
PWM-waves-generated-module-VHDL-code
- 此为基于FPGA的直流伺服系统的设计，具体为PWM波生成模块的VHDL代码-This is the dc servo system based on FPGA design, specific for PWM waves generated module VHDL code
PWM
- 通过设置时钟实现脉冲宽度调制的verilog代码及测试(By setting the clock to achieve pulse width modulation of the Verilog code and test)
deadzone
- 代码功能是实现脉冲信号的死区控制。根据输入脉冲实现10us的死区，避免IGBT直通。(The code function is to realize the dead zone control of the pulse signal. The dead zone of 10us is realized according to the input pulse, and the direct connection of IGBT is avoided.)