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uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
rs232
- 本设计是PC和FPGA的串口通信的程序，用的是VERILOG语言，调试成功，用户可根据自己的项目稍作改动。-The design is a PC and the FPGA' s serial communication procedures, using a VERILOG language, debugged, the user can make a little change according to their own projects.
DataCntrl
- 系统由 DataCntrl.vhd 和RS232RefComp.vhd 模块构成。该模块能和PC 机的RS232 终端 （比如PC 机上的串口调试工具程序）以波特率9600 通信。-System consists of DataCntrl.vhd and RS232RefComp.vhd module. The module can and PC-RS232 terminal (such as PC, the serial debugging utility) to 9600 baud co
rs232c
- 基于EP1C6Q240的串口rs232通信程序代码设计，简单易懂，调试通过，基于quartus6.0-Serial rs232 communication based EP1C6Q240 code design, easy to understand, debug through, based on quartus6.0
rs232-demo-for-send-welcome
- 这个一个用于fpga上面的串口调试程序，基于vhdl语言编写，可实现welcome字符的现实功能。-Fpga above this one for the serial debugger, based on vhdl language, the reality can be realized characters welcome feature.
rs232
- FPGA与PC串口调试工具通信程序，包括收和发两个过程。-Program for communication between FPGA and the PC serial port debug tool ,including sending and receiving processes.
RS232
- （6）实验6：串口通讯实验，完整的设计工程文件在RS232文件夹下二、运行环境 程序在以下环境调试通过： （1）Windows XP； （2）Altera公司的Quartus II 8.0 for windows； （3）Altera公司的Nios II 8.0 IDE for windows； （4）Mentor公司的ModelSim SE 6.0；-(6) (2) Altera Corporation Quartus II 8.0 for windows Exp
sdram_mdl
- 关于RS232串口调试中接收和发送的控制模块部分的程序-About the RS232 serial port receive and transmit debugging control module part of the program
uart
- RS232串口调试程序，已经经过试验和调试，很方便，带注释-RS232 serial debugger
Verilog-RS232
- 本程序是在FPGA里面模拟RS232串口，并在已调试成功。-This procedure is simulated in FPGA RS232 serial port, and in the debugging success
test_232
- 这里包含了FPGA的232串口调试程序，可供学习和借鉴-FPGA RS232 TEST