搜索资源列表
vhdldds0000
- 采用fpga的hdl语言实现dds的信号发生器的设计，性能与传统相比明显提高。-Hdl language using FPGA implementation of the signal generator dds design, performance markedly improved compared with the traditional.
SIGNAL_GEN
- 利用EDA的VHDL硬件描述语言设计的函数信号发生器，可以产生递增、递减斜波，三角波，阶梯波，正弦波，方波-The use of EDA, VHDL hardware descr iption language design function of the signal generator can generate increased progressively decreasing ramp, triangle wave, step-wave, sine wave, square wave
wave_finish
- 基于quartus2的信号发生器，可产生正弦，三角，方波-Based quartus2 signal generator can produce sine, triangle, square wave. .
signal-generator
- 基于FPGA的多功能信号发生器，可以更改频率，波形，占空比-FPGA-based multi-function signal generator, can change the frequency, waveform, duty cycle
low-frequency-signal-generator
- 实现基于单片机的低频信号发生器，程序完整，参考性好-MCU-based low-frequency signal generator
Signal-Generator-VHDL
- 这是基于quartus dds信号发生器设计的源程序-This is based on quartus dds source signal generator design
signal-generator
- 此为简易信号发生器设计，波形可选（锯齿波、三角波、方波、正弦波），幅度可选（0dB、20dB、40dB、60dB），频率可选（0-1kHz）-a signal generator
adjustable-signal-generator
- 这是一个可调的信号发生器,可产生正弦波,矩形波,三角波,用SignalTap II 仿真 -This is an adjustable signal generator, can produce sine, square wave, triangle wave, with the SignalTap II simulation
signal-generator
- 基于VHDL的函数信号发生器【正弦波、三角波、锯齿波、方波】-signal generator【VHDL】
Signal-generator-
- 信号发生器（方波，三角波，正弦波，锯齿波，正弦波）幅值，频率可调-Signal generator (square wave, triangle wave, sine wave, sawtooth wave, sine wave) amplitude, frequency adjustable
Sinusoidal-signal-generator-design
- 正弦信号发生器设计，简单组合电路的设计，多层次电路设计-Sinusoidal signal generator design，Simple combinational circuit design, multi-level circuit design
Signal-generator
- 关于信号发生器的各种电子书，包括信号，滤波等内容。-A variety of e-books on the signal generator, signal filtering.
signal-generator
- 关于任意信号发生器的一些设计,以及具体的电路图，时钟，DA转换-signal generator
signal-generator
- 本文描述了双通道信号发生器的研制，利用FPGA来实现这项功能-with the use of FPGA technology to realize signal generator
Digital-base-band-signal-generator
- 基于FPGA的数字基带码的设计.数字基带码；EDA；VHDL；PCB；FPGA-Based on FPGA Digital base-band signal generator design
Controllable-sine-signal-generator
- 通过MATLAB的SIMULINK模型设计，实现可控正弦信号发生器，并通过DSP BUILDER中的SIGNAL COMPILER转换成QuartusII工程，并实现硬件的下载。-Through the MATLAB SIMULINK model design, realization controllable sine SIGNAL generator, and through the DSP BUILDER of SIGNAL COMPILER converted into QuartusI
Choosing-signal-generator
- 基于FPGA的模拟信号源设计（中英文翻译） CPLD 信号发生器 频率捷变 无线电-FPGA signal generator frequency-agile
signal-generator
- 入门级。正弦信号发生器，很详细,是老师给的，已经调试过，，nois2-for basic learner， sine signal generator
signal-generator
- Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
DDS-signal-generator
- 基于DDS的函数信号发生器，产生正弦波，通过按键控制输出频率-Produce sine function signal generator, based on DDS, through the keys to control the output frequency