搜索资源列表
Viterbi_v
- Viterbi算法的Verilog源代码。-Viterbi Algorithm Verilog source code.
viterbi
- verilog程序，实现了（2，1，4）卷积码编码，和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
20080923
- This is nice paper on soft output viterbi error correcting algorithm
viterbi
- 对于语音信号的Viterbi算法的简单仿真实现 在QuartusII下-Viterbi algorithm for speech signals simple simulation to achieve in the next QuartusII
FPGAOFDM
- 频偏校正算法的ＦＰＧＡ实现源码，相信对大家很有帮助。-Viterbi algorithm for FPGA implementation source code, I believe very helpful to everyone.
Design-Space-Exploration-of-Hard-Decision-Viterbi
- Space Exploration of Hard-Decision Viterbi Decoding: Algorithm and VLSI Implementation
The-viterbi-algorithm-(1)
- Vetrbi decoder VHDL code
vhcg_latest.tar
- Viterbi algorithm is the most likelihood decode algorithm of convolution code. Viterbi decoder means the VLSI implementation of Viterbi algorithm. In the area of communication, convolution code is very popular, so how to improve the performance a
conv_dencode
- 基于quartus软件的卷积译码算法，应用维特比译码算法完成-Convolutional decoding algorithm based on the quartus software.complete the application of viterbi decoding algorithm
acs
- This an ACS unit which can be used in log-map algorithm as well as viterbi algorithm-This is an ACS unit which can be used in log-map algorithm as well as viterbi algorithm
handbook
- Abstract—This paper presents a Viterbi-based test compression algorithm/architecture that provides high encoding efficiency and scalability with respect to the number of test channels. The proposed scheme finds a set of compressed test vectors
viterbi_decode_veeren
- Viterbi decoding algorithm
Viterbi_algorithm_VeeRen
- Viterbi algorithm using Verilog
verilog-juanjima
- 卷积码是一种重要的前向纠错信道编码方式，其纠错性能常常优于分组码，且(2,1,7)卷积码已应用于现代卫星通信系统中。Viterbi译码算法能最大限度地发挥卷积码的优异性能。这里采用Verilog HDL语言设计出(2,1,7)卷积码的编码器模块和基于Viterbi算法的译码器模块，译码器采用全并行结构，译码速度快-Convolutional code is an important forward error correction channel coding method, and