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FPGA控制AD程序,ADC,DAC转换接口
- FPGA控制AD程序,ADC,DAC转换接口.rar 有限状态机控制AD采样.rar,FPGA control AD procedure
TLC2543
- 使用Verilog实现的AD采样,很有用的!-Implemented using Verilog AD sampling, very useful!
TLC549
- verilog TLC549AD采样程序 ,速度200K,在LED和数码管上显-verilog TLC549AD sampling procedures, the speed of 200K, in the LED and digital tube significantly
EP1C3_12_5_RSV
- 基于FPGA的数字存储示波器,用VHDL实现的,压缩包里是Quartus工程。AD采样送进FPGA,存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
TLC5510
- 在超声波流量计中,能进行高速的ad采样,以达到ad转换的目的-In ultrasonic flowmeter, the ad can be sampled at high speed to achieve the purpose of ad conversion
LVDS_DDR_List_FPGA2
- FPGA芯片与ADI公司的AD9779之间的通信,总共有四个通道,68对LVDS,采样时钟是122.88MHz-FPGA chips ADI' s AD9779 and communication between, a total of four channels, 68 pairs of LVDS, the sampling clock is 122.88MHz
dig_scan
- 将AD采样的八位比特转化为十进制数值大小,并用数码管动态显示-The AD sample into the eight-bit decimal numerical size, and dynamic display with digital control
CON_AD
- 控制AD采样的程序,希望对大家能有所帮助!不对之处请多多指导!-I think it is a goog pragram ,I hope it is good for you !
FPGA_AD
- 基于 Cyclone EP1C6240C8 FPGA的ADS2807接口程序,主要用来使用FPGA控制ADS2807的采集。 采用FPGA来模拟ADS2807的时序来实现控制功能。 提供采样频率控制、AD通道转换、采样数据缓存等功能。-Cyclone EP1C6240C8 FPGA-based interface program of the ADS2807, ADS2807 is mainly used to control the use of FPGA collection. AD
AD
- ad7667的高速采集程序,采样率800kbps,16位精度采样-ad7667 high-speed acquisition procedures, sampling rate of 800kbps, 16 bit accuracy sampling
WM_8776
- WM8776控制模块,直接调用为24位、44.1KHZ采样和输出,开启耳机输出。如需更改可将DA,AD和控制模块分别独立-WM8776 control module, a direct call for the 24-bit, 44.1KHZ sampling and output, open the headphone output. For a change can be DA, AD and control modules separately
V_ADC_SPCTR_ANALZ
- 包括了高速AD采样分析设计的全部源码,可直接应用于实际信号的AD采样分析。-Including the design of high-speed AD sampling and analysis of all source code, can be directly applied to samples of the actual signal AD.
AD
- 利用VHDL是实现对ADC0809对信号是实现采样-VHDL is used to realize the ADC0809 samples the signal is achieved
adc0809
- VHDL实现AD采样控制,程序简单,调试方便-AD sampling control VHDL implementation, the program is simple and convenient debugging
AD_sample_100Mhz
- 用Verilog编写的FPGA AD采样 用Verilog编写的FPGA AD采样-AD_sample_100Mhz
amplitude-measuring
- 通过AD采样测量幅值,并通过平均运算后输出到数码管显示-Measured by sampling the amplitude of AD, and after the operation by the average output to digital display
frequency-measuring
- 通过AD采样测量频率,输出到数码管显示,测量低频效果并不好-Measured by AD sampling frequency, the output to a digital display, measuring low-frequency effect is not good
ad-ram
- ad采样 通过fpga 传输给ram-ad fpga ram verilog
AD
- 一个使用VHDL语言实现AD采样控制及其数据的存储实现,让大家借鉴借鉴学习,也希望大家提出意见-Inside is a sampling AD using the VHDL language and its data storage to achieve control, so that we learn learn
ADM_code
- AD采样转换,采用verilog完成,可直接使用。(AD TRANSMIT using verilog complete, can be used directly.)