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EP2C20_TEST.rar
- 内含无刷电机驱动VHDL模块,读码盘4倍频模块,并用NIOS核实现简单无刷电机闭环控制。,Brushless motor driver includes VHDL modules, reading frequency module plate 4, and nuclear NIOS simple closed-loop control of brushless motor.
pid_controler_latest.tar
- PID控制器的verilog实现,做闭环控制器的人可以参考-PID controller verilog implementation of closed-loop controller may make reference to
motorcontrolabc
- 基于CycloneEPC8240FPGA的直流电机控制程序,实现了电机的闭环控制,调挡,正反转。-DC motor control based on CycloneEPC8240FPGA procedures to achieve closed-loop motor control, tone block, positive.
current_measurement
- 这是一个实现了无刷直流电机闭环控制电流环检测的程序,一起还有滤波器的使用。性能良好。为个人原创-This is a realization of the closed-loop control of brushless DC motor current loop detection procedure, also with the use of filters. Good performance. Be original
rs232_rec5
- VHDL语言实现的穿行通讯,可实现闭环操作,通讯过程中每个bit位采样3次,保证数据准确。-VHDL language achieved through communication, can realize the closed-loop operation, communication process each bit digital sampling 3 times to ensure accurate data.
2008081014094045
- 步进电机细分ip核,闭环回路反馈,详见注释-Ip Subdivision stepper motor nucleus, closed loop feedback, see note
FPGA-PID-
- FPGA闭环控制电路积分分离式PID算法子程序 算法函数 中断函数-Integral closed loop control circuit FPGA PID algorithm separate interrupt function subroutine algorithm function
uart
- FPGA基于串口指令的多电机闭环调速系统-FPGA based multi-port instruction Motor Closed Loop System
motor-control
- 直流电机的简单控制,可以完成闭环控制,转速加速度实时测量。-Simple DC motor control, closed-loop control can be completed, real-time measurement speed acceleration.
closed_SPWM
- 带PI闭环测试生成的SPWM方案已通过测试,可以实现SPWM输出 -SPWM scheme with a PI closed-loop test generation has been tested, you can achieve SPWM output
PI
- 实现PI控制算法,通过调节比例积分参数可实现对不同应用的PI闭环控制-Realize PI control algorithm parameters by adjusting the proportional-integral PI closed-loop control can be achieved for different applications
ethernet_loopback
- 通过FPGA驱动千兆以太网口,完成SPARTAN6上的UDP数据包闭环测试,即通过网口发送数据包到FPGA,FPGA内部将接收到的数据返回到PC机,建议测试之前添加ARP静态绑定,FGPA内部的IP以及MAC地址在ROM里的COE文档里可以看到,发送端添加了CRC以及整体CHECKSUM的计算(Driven by FPGA Gigabit Ethernet port, UDP SPARTAN6 data packet on the closed loop test, through the ne
