搜索资源列表
-
0下载：
一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
-
-
0下载：
Altera公司的Verilog HDL 代码编写规范-Altera Verilog HDL code style for the proposed specification
-
-
0下载：
write the verilog code for the following specification & perform the linting checks
-
-
0下载：
wishbone的verilog代码的实现，标准的协议规范-wishbone of the verilog code implementation, the standard protocol specification
-
-
0下载：
source code is an example of adc and pwm program in atmega 8535. This code will make the microcontroller converts each input of the ADC pin and make it into OCR0 value. This OCR0 value will affect the shape of the generated pwm signal. OC0 pin on POR
-
-
0下载：
sram读写操作，时序规范说明和详解，代码说明很详细，很适合新手-sram read and write operations, the timing specification and Xiangjie code describing in great detail, it is suitable for novice
-
-
0下载：
vhdl的代码规范。包括命名、语句使用等。注重可移植性以及硬件资源的节约。-vhdl code specifications. Including naming, such statements use. Attention to portability and hardware resource conservation.
-
-
0下载：
企业用verilog代码风格规范 本规范规定了IC设计项目开发过程中VerilogHDL源代码的编写总则、要求及模板文件。-Enterprises with verilog code style guide for the preparation of this specification General IC design project development process VerilogHDL source code, requirements and template files.
-
-
0下载：
verilog代码编写规范，主要是华为的相关规范，对于想提高FPGA技术的工程师非常有帮助-Verilog code to write specifications, mainly related to the specification of HUAWEI, for the engineers to improve the FPGA technology is very helpful
-
-
0下载：
mealy状态机示例代码，可以在此代码上学期规范的状态机写法-mealy state machine sample code, this code can be on a state machine specification semester wording
-
-
0下载：
实现了3-8译码器的组合逻辑和时序逻辑，正确性已经通过了仿真验证，代码规范(The combined logic and timing logic of the 3-8 decoders are implemented. The correctness has already passed through the simulation verification, the code specification)
-
