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tlk1221jiaoyan_k
- 采用8B/10B编码方式，以不同的模式插入K28.5码进行数据校验，验证tlk1221芯片的数据传输是否正确，观察收发数据是否一致。-To check the data which is transceived by the way of 8B/10B coder/decoder by asserting K28.5 code in different mode and to observe that whether these data have been missed in the tran
mp3
- MP3解码器的VHDL源代码 ,很实用的，设计时可以参考 ，很罕见的完整MP3 decoder源码 -VHDL code for MP3 decoder
1
- 基于FPGA的改进turbo码译码器的设计与实现-FPGA-based turbo decoder to improve the design and implementation
coder-decoder
- 基于FPGA的8路并行数据加2路视频数据的编解码-FPGA-based 8-way parallel data plus 2 video encoding and decoding of data
decoder
- This paper put forward a pseudorandom sequence coder and decoder design scheme based on FPGA technology, in order to simulate the process of SSC (Spread Spectrum Communication). This scheme can be used as a didactical method to introduce SSC techno
decoder
- coder for different modules in verilog
Chapter4
- Chapter4文件夹： （1）实验1：编码器实验，完整的设计工程文件在CODER文件夹下 （2）实验2：译码器实验，完整的设计工程文件在DECODER7文件夹下 （3）实验3：加法器实验，完整的设计工程文件在ADDER和ALU文件夹下 （4）实验4：乘法器实验，完整的设计工程文件在4BITMULT文件夹下 （5）实验5：寄存器实验，完整的设计工程文件在SHIFT8R和SHIFT8文件夹下 （6）实验6：计数器实验，完整的设计工程文件在COUNT10文件夹下
MP3-coder
- In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read t
BCH
- BCH coder and decoder. Uses special DMA connection