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PWM_deadtime
- 利用HDL语言编写的PWM死区时间的实现，已经通过本人仿真验证，对于电力电子行业的研发人员有帮助-Using HDL languages implementation of PWM dead time has passed my simulation, for the power electronics industry, R & D staff to help
The-SA4828--software-design
- 利用大规模专用集成电路SA4828 设计变频器，可以大大降低CPU 的资源占用，简化硬件电路和软件编程。通过对SA4828 进行初始化编程，可以方便地设定变频器的基本参数包括：载波频率、调制波频 率范围、死区时间、最小删除脉宽、看门狗时间常数、输出波形、频率、幅值、正反转控制等。实验表明，由SA4828 组成的变频器，电路简单，操作方便，运行稳定可靠。-Large-scale ASIC the SA4828 design inverter can greatly reduce the CPU
DEADTIME510
- 产生全桥逆变电路的驱动脉冲信号，能够保证死区时间，且随输入信号频率的变化而变化。-Produces full-bridge inverter circuit driving pulse signal, to ensure that the dead time, and with the input signal frequency changes.
spwm3
- 通过0，1序列来产生所需SPWM信号，带死区时间。可通过该SPWM信号通过H桥式电路控制电流形状。-The time required to generate SPWM signals with dead by 0,1 sequence. By H-bridge circuit to control the current through the SPWM signal shape.
transmit
- vhdl实现1Hz发射桥路控制信号，设有死区时间。-vhdl achieve 1Hz emission control signal bridge, with a dead time.
PWM-dead-zone
- 实现PWM输出的死区控制，可保证避免上下桥臂同时导通损坏功率器件-Achieve PWM output dead time control, can guarantee to avoid simultaneous conduction of upper and lower leg damage power devices